PMC · DOI:10.3390/mi16050537·April 30, 2025
Correction: Hsieh et al. Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits. Micromachines 2020, 11, 741
Tung-Ying Hsieh, Ping-Yi Hsieh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Wen-Kuan Yeh, Meng-Chyi Wu
Abstract
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Topics3D IC and TSV technologies · Semiconductor materials and devices · Advancements in Semiconductor Devices and Circuit Design