# Correction: Hsieh et al. Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits. Micromachines 2020, 11, 741

**Authors:** Tung-Ying Hsieh, Ping-Yi Hsieh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Wen-Kuan Yeh, Meng-Chyi Wu

PMC · DOI: 10.3390/mi16050537 · 2025-04-30

## Full-text entities

- **Chemicals:** Si (MESH:D012825)

## Figures

2 figures with captions in the complete paper: https://tomesphere.com/paper/PMC12113719/full.md

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Source: https://tomesphere.com/paper/PMC12113719