Pixel detector R&D for the Compact Linear Collider

TL;DR

This paper reviews the R&D efforts on pixel detectors for the CLIC collider, highlighting innovative sensor technologies, readout ASICs, and simulation tools to meet demanding spatial, timing, and material requirements.

Contribution

It presents recent developments in hybrid and monolithic silicon pixel detectors, including new ASICs and sensor integration techniques, for high-performance vertex and tracking detectors at CLIC.

Findings

Successful production of CLICpix2 ASICs in 65nm CMOS.

Development of monolithic prototypes in HR-CMOS, HV-CMOS, and SOI.

Positive test-beam and simulation results demonstrating detector performance.

Abstract

The physics aims at the proposed future CLIC high-energy linear $e^+ e^-$ collider pose challenging demands on the performance of the detector system. In particular the vertex and tracking detectors have to combine precision measurements with robustness against the expected high rates of beam-induced backgrounds. A spatial resolution of a few microns and a material budget down to 0.2\% of a radiation length per vertex-detector layer have to be achieved together with a few nanoseconds time stamping accuracy. These requirements are addressed with innovative technologies in an ambitious detector R\&D programme, comprising hardware developments as well as detailed device and Monte Carlo simulations based on TCAD, Geant4 and Allpix-Squared. Various fine pitch hybrid silicon pixel detector technologies are under investigation for the CLIC vertex detector. The CLICpix and CLICpix2 readout ASICs with \SI{25}{\micro\meter} pixel pitch have been produced in a \SI{65}{\nano\meter} commercial CMOS process and bump-bonded to planar active edge sensors as well as capacitively coupled to High-Voltage (HV) CMOS sensors. Monolithic silicon tracking detectors are foreseen for the large surface ($\approx$ \SI{140}{\meter\squared}) CLIC tracker. Fully monolithic prototypes are currently under development in High-Resistivity (HR) CMOS, HV-CMOS and Silicon on Insulator (SOI) technologies. The laboratory and beam tests of all recent prototypes profit from the development of the CaRIBou universal readout system. This talk presents an overview of the CLIC pixel-detector R\&D programme, focusing on recent test-beam and simulation results.

Full text

1 Introduction

The CLIC high-energy linear $e^{+}e^{-}$ collider, under development by international collaborations hosted by CERN, is based on the novel two-beam acceleration method, operating with large gradients of $70100\text{\,}\mathrm{MV}\text{\,}{\mathrm{m}}^{-1}$ in a normal conducting accelerating structure. It is proposed to be operated in a staged scenario with respectively $380\text{\,}\mathrm{GeV}$, $1.5\text{\,}\mathrm{TeV}3\text{\,}\mathrm{TeV}$ centre-of-mass energy [1]. The CLIC beam is composed of trains that consist of 312 bunches separated by $500\text{\,}\mathrm{ps}$ with a $50\text{\,}\mathrm{H}\mathrm{z}$ train repetition rate. In the CLIC vertex and tracking detector, a high rate of incoherent pairs and $\gamma\gamma\xrightarrow{~{}}$ hadrons generated from beam-beam interactions.

The CLIC detector aims at performing high precision measurements of standard and beyond standard model physics. This imposes challenging performance requirements on the detectors. The vertex detector, illustrated in Figure 2, consists of barrel and disks directly surrounding the beam pipe, covers a surface of $0.84\text{\,}{\mathrm{m}}^{2}$ and is composed of pixel detectors with a pitch of $2525\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$ for an expected single point resolution of $3\text{\,}\mathrm{\SIUnitSymbolMicro m}$. The Tracking detector, illustrated in Figure 2, is composed of pixelated silicon detectors with a pixel pitch of $251000\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$ and covering a large area of $140\text{\,}{\mathrm{m}}^{2}$. In both detectors, in order to cope with the occupancy and help with pattern recognition, a timing resolution of $5\text{\,}\mathrm{ns}$ is required. To meet the performance requirements of CLIC, the material budget allowed for each of the six layers and seven disks of the pixel detector is $0.2\text{\,}\mathrm{\char 37\relax}~{}\mathrm{X}_{\mathrm{0}}\mathrm{/}\mathrm{l}\mathrm{a}\mathrm{y}\mathrm{e}\mathrm{r}$ and $12\text{\,}\mathrm{\char 37\relax}~{}\mathrm{X}_{\mathrm{0}}\mathrm{/}\mathrm{l}\mathrm{a}\mathrm{y}\mathrm{e}\mathrm{r}$ for the five layers of the Tracker, including local support and services.

Taking advantage of the low duty cycle of the accelerator, the vertex and tracking detector are operated using power pulsing. The readout and front-end electronics are turned off when not in use, in order to reduce the power consumption to $50\text{\,}\mathrm{mW}\text{\,}{\mathrm{cm}}^{-2}$ for the vertex detector and below $150\text{\,}\mathrm{mW}\text{\,}{\mathrm{cm}}^{-2}$ for the Tracking detector. This reduction in power consumption allows for the use of air cooling which reduces the need for material for active cooling in the vertexing volume. The radiation damage estimated in the vertex detector is of less than $1\text{\times}{10}^{11}\text{\,}\mathrm{n}_{eq}\mathrm{/}\mathrm{c}\mathrm{m}\mathrm{{}^{2}}\mathrm{/}\mathrm{y}\mathrm{e}\mathrm{a}\mathrm{r}$ and $1\text{\,}\mathrm{k}\mathrm{G}\mathrm{y}\mathrm{/}\mathrm{y}\mathrm{e}\mathrm{a}\mathrm{r}$ and is considered negligible in the Tracking detector.

2 CLICdp tools for pixel detector prototype characterisation and simulation

The CLICdp collaboration studies the available pixel detector technologies, evaluates their tracking performance and identifies promising technologies for the construction of the CLIC tracking and vertex detectors. In order to carry out the characterization and modeling of the prototypes realized in these technologies, a set of tools have been developed.

To extract the single-point resolution, particle detection efficiency and timing resolution of the prototypes, the Timepix3 telescope [2, 3] has been constructed. To provide a versatile platform for the development of a readout system for each of the prototypes, the CaRIBOu test system was developed [4].

Simulation tools such as technology computer-assisted design (TCAD) simulation and Monte-Carlo charge transport were employed to increase the understanding of the detector and provide feedback for the designers realizing the prototypes. The Allpix2 framework [5] was developed to integrate the benefits of Geant4 [6], charge transport algorithm and TCAD simulations into a user friendly platform for simulation of silicon detectors.

2.1 The CLICdp Timepix3 telescope

The Timepix3 ASIC [7] is a readout designed for silicon and gaseous pixelated detectors with an array of $256\times 256$ pixels with a pitch of $5555\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$, providing for each detected hit a $10\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ Time-Over-Threshold (TOT) measurement with $25\text{\,}\mathrm{ns}$ granularity and a $14\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ Time-Of-Arrival (ToA) measurement with a $1.5625\text{\,}\mathrm{ns}$ binning.

The telescope consists of $7\times$ Timepix3 assemblies readout by the SPIDR system [8]. The clock distribution to the planes is assured by a Trigger Logic Unit (TLU) providing the time reference ($t_{0}$) and measuring accurately the coincidence signal of two scintillator tiles located at each end of the telescope. The mechanical assembly of the telescope is illustrated in Figure 4.

The Devices Under Test (DUTs) characterized with the telescope are positioned at the center of the telescope and aligned using motorized rotation and translation stages. The clock from the TLU and the $t_{0}$ signal are provided to the DUT along with a trigger signal produced from the coincidence of the scintillator tiles. The data collected are reconstructed using the Corryvreckan and EUTelescope reconstruction framework [9, 10]. Combining the timing information of the scintillators and the telescope planes, a timing resolution per track of $1\text{\,}\mathrm{ns}$ is achieved along with a pointing resolution at the DUT of $3\text{\,}\mathrm{\SIUnitSymbolMicro m}$.

2.2 The CaRIBOu test system

The control and readout interface board unit (CaRIBOu) [4] is a versatile readout system designed to facilitate the design of the interface to pixel detector prototypes. It consists of a hardware system, composed of the CaR board, the Zynq ZC706 FPGA development board and a prototype specific carrier board unit, as illustrated in Figure 4.

The CaR board is a custom board interfacing to the Zynq FPGA that provides the resources needed for a variety of prototypes, listed below.

• •

$8~{}\times$ adjustable power supplies, $0.83.6\text{\,}\mathrm{V}$,$3\text{\,}\mathrm{A}$

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$32~{}\times$ adjustable voltage references, $04\text{\,}\mathrm{V}$

• •

$8~{}\times$ adjustable current references, $01\text{\,}\mathrm{mA}$

• •

$4~{}\times$ programmable injection pulsers

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$10~{}\times$ output and $14~{}\times$ input CMOS signal, $0.83.6\text{\,}\mathrm{V}$

• •

$17\times$ LVDS signal routed to FPGA + $8\times$ full-duplex GTx links for high speed data transmission up to $12\text{\,}\mathrm{G}\mathrm{b}\mathrm{i}\mathrm{t}\mathrm{/}\mathrm{s}$

• •

Low jitter clock generator, slow and fast ADC, $8~{}\times$ $50\text{\,}\mathrm{k}\mathrm{s}\mathrm{/}\mathrm{s}$, $16~{}\times$ $65\text{\,}\mathrm{M}\mathrm{s}\mathrm{/}\mathrm{s}$

The firmware for the CaRIBOu system is developed using a modular architecture with the different functionalities needed for the readout integrated into self-contained Intellectual Property blocks (IPs) interfaced to the Zynq ARM CPU through a standard AXI4 bus. The software for the system is based on the yocto Linux distribution and provides the libraries to control the interfaces connected to the FPGA, as illustrated in Figure 5. The software provides a Hardware Abstraction Layer (HAL), a convenient way to control all the resources of the CaR board and communicate with the device specific firmware IP blocks implemented for each DUT. For test-beam operation with the Timepix3 telescope, an interface to the TLU receiving the clock and $t_{0}$ signal have been implemented to synchronize the DUTs to the telescope and enable their characterization.

2.3 TCAD and Allpix2 Monte-Carlo simulation

During the detector design phase of our prototypes, input from TCAD simulation is used to provide guidance to make technological choices. However, the computing time required for simulating the interaction of particles with the detector spans from minutes for simplified two dimensional simulations to hours for more complex three dimensional simulations which makes it impractical to predict the behavior of devices in statistical terms.

The Allpix2 framework [5] was developed to provide a versatile, generic tool for Monte-Carlo simulations of pixel detectors. The geometry to be simulated is described using text interface and includes all the features of pixel detectors such as support printed circuit boards (PCB), bump-bonds and other materials attached to the device. The particle sources are defined and the interactions of the particles with the detectors are simulated using Geant4. The resulting deposited energy, converted to electron-hole pairs, can be propagated through the bulk of the sensors using the provided propagation modules that include effects of drift, diffusion and the Lorentz effect in presence of a magnetic field as shown in Figure 7. The electric field can be selected from implemented models or imported from a TCAD simulation software in the DF-ISE format. The resulting propagated charges can then be converted to signal provided to the front-end electronics. The digitization of the signal is performed using parametrized models of the front-end response. The final simulation results can be output in various telescope reconstruction frameworks such as Corryvreckan [9], Proteus [11] and Eutelescope [10]. This feature allows for easy comparison between simulated and test-beam data.

The software structure of Allpix2 is highly modular, with a core software providing the required facilities such as geometry description, parsing tools, logging tools and persistent storage of the generated data. The simulation steps, from energy deposition to digitization are enclosed in modules that make use of the core functions. New modules can easily be integrated to replace or supplement the simulation flow. A typical simulation configuration is illustrated in Figure 7.

3 Vertex and tracker detector prototypes

The CLICdp collaboration’s effort in developing new technologies for vertexing and tracking covers the study of hybrid solutions and novel monolithic pixel detector technologies. Hybrid detectors allow for more complex integration and logic by separating the readout electronics from the sensor, at the cost of more complicated interconnect technology. Planar sensors, capacitively-coupled CMOS sensors (CCPD) and enhanced lateral drift sensors (ELAD) are under study. The monolithic CMOS approach, integrates the sensor and readout in the same silicon die, therefore it avoids the complex interconnect process and achieve lower material budget, at the cost of reduced functionality with regard to the hybrid solution. Silicon-on-insulator (SOI) CMOS pixels, high-voltage HV-CMOS and high-resistivity HR-CMOS technologies are under study. SOI-CMOS and Enhanced lateral Drift (ELAD) hybrid sensors are covered in a separate proceeding article of this series.

3.1 Planar sensor assemblies and CLICpix2

The CLICpix2 ASIC [12] is a $65\text{\,}\mathrm{nm}$ CMOS pixel readout designed to meet the requirements of the CLIC vertex detector. The matrix consists of 128 $\times$ 128 pixels with a pitch of $2525\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$. Each pixels provide a $5\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ TOA and $8\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ TOT measurement over a clock up to $100\text{\,}\mathrm{MHz}$. Power-pulsing of the matrix and readout circuitry is implemented and executed through an external control signal to reach the power consumption target for CLIC vertex detector of $50\text{\,}\mathrm{mW}\text{\,}{\mathrm{cm}}^{-2}$ in CLIC operation conditions. Table 8 summarizes the achievable simulated performance of the analog front-end. A low threshold ($\geq$440\text{,}\mathrm{e}$$) and low noise ($70\text{\,}\mathrm{e}$) are required to handle the small signal of the thin, low material budget sensors under study.

Hybridization of the CLICpix2 to planar sensors produced with active-edge technology produced with Advacam and FBK was performed at IZM using $\mathrm{SnAg}$ bump-bonding technology. The ASICs, already diced, were mounted on support wafers and went through the bump deposition process. The fine pitch of $25\text{\,}\mathrm{\SIUnitSymbolMicro m}$ of the ASIC and sensor represents a challenge for this technology, but preliminary results show that interconnect yields of above 99.9% can be achieved. Figure 8 shows an example of successful bump connections between the sensor and ASIC. Further studies of the assemblies are ongoing and new high-density interconnect technologies such as an Anisotropic Conductive Films (ACF) are explored.

3.2 Capacitively Coupled Pixel Detector (CCPD) sensor assemblies

CCPDs were investigated using sensors designed for AC coupling to readout ASIC and produced in a commercial $180\text{\,}\mathrm{nm}$ HV-CMOS technology. The C3PD sensor [13] and its predecessor the CCPDv3 [14] were produced with the footprint of the CLICpix2 and its predecessor the CLICpix [15]. The coupling to the ASIC is performed through a thin glue layer applied to the sensor with a glue dispenser, followed by precision alignment and connection with the use of an ACC$\mu$RA 100 high accuracy bonder [16]. Figure 9 shows an example of a glue assembly on a PCB and of the achieved interface between ASIC and sensor.

The CCPDv3 and C3PD were simulated using TCAD [17]. The signal generated by particles at different incident angle was simulated and the transfer function of the readout electronics was applied to the simulated signal. The produced assemblies were characterized in a test-beam using the Timepix3 telescope. Figure 10 shows a comparison of results obtained with TCAD and front-end simulation and the experimental results obtained from test-beam. Further characterization of CCPD assemblies can be found elsewhere [18].

3.3 Monolithic small fill-factor sensors

For the CLIC tracking detector, monolithic pixel sensors are foreseen due to their large scale production capabilities and low material budget achievable. Small fill-factor CMOS sensors are composed of a small n-type collection electrode separated from a large p-type well in which the readout electronics is located. The separation of the CMOS circuitry from the collection diode well allows reducing cross-talk between the two elements. The small size of the collection electrode leads to a small input capacitance and therefore low noise and power consumption of the front-end. The ALICE Investigator chip [19] was characterized in a test-beam using the Timepix3 telescope. Detailed TCAD simulations of the different diode geometries included in the Investigator were produced [20] in order to understand the charge collection process with small collection diodes. The electric field simulated was imported into Allpix2 and a detailed simulation of the test-beam was carried out. Figure 11 show comparisons of the simulation to test-beam measurements showing a good agreement between the model and collected data.

Following the encouraging results from the ALICE Investigator, a CLIC specific sensor has been designed meeting the requirements of the CLIC tracking detector. Using TCAD and Monte-Carlo simulation validated with Investigator data, the implant layout and geometry of the pixels was optimized to meet CLIC requirements. Details of the simulations can be found elsewhere in the proceeding series. The CLICTD technology demonstrator consists of physical pixels of $3037.5\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$ containing a pre-amplifier and discriminator combined in a logical pixel of $30300\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$, as illustrated in Figure 12. Each logical pixel can measure TOT with $5\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ precision and TOA with $8\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ precision using a $100\text{\,}\mathrm{MHz}$ clock. Each logical pixel also provides the information on which physical pixels were fired during the active period. The ASIC implements power-pulsing of the front-end and readout electronics in order to meet CLIC power consumption requirements. CLICTD was sent for production in February 2019.

3.4 Monolithic large fill-factor sensors

Large fill-factor Monolithic CMOS sensors implement the readout electronics in a large n-type well that acts as the collecting electrode. The ATLASpix simple sensor [21], originally designed for the ATLAS CMOS collaboration, is being characterized in a test-beam to evaluate its performance with regard to CLIC tracking detector specifications. It consists of a large matrix of 16\text{\,}\times$$3.25\text{\,}{\mathrm{mm}}^{2} pixels with a pitch of $13040\text{\,}{\mathrm{\SIUnitSymbolMicro m}}^{2}$. Each pixel provides a $10\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ TOA and $6\text{\,}\mathrm{b}\mathrm{i}\mathrm{t}$ TOT measurement on a clock of up to $160\text{\,}\mathrm{MHz}$. Data are readout through a $1.6\text{\,}\mathrm{G}\mathrm{b}\mathrm{i}\mathrm{t}\mathrm{/}\mathrm{s}$ serial link. A prototype of the ATLASpix sensor with a substrate resistivity of $200\text{\,}\mathrm{\SIUnitSymbolOhm}\cdot\mathrm{c}\mathrm{m}$ was thinned to a thickness of $100\text{\,}\mathrm{\SIUnitSymbolMicro m}$ and characterized in a test-beam using the Timepix3 telescope.

Figure 13 shows the results of the detection efficiency, spatial and temporal resolution of the ATLASpix prototype. Due to the low resistivity and thickness of the substrate, only a low amount of charge sharing was observed (approximately 10% multi-pixel clusters) and the spatial resolution in both directions is compatible with the pitch of the pixel. Good detection efficiency at perpendicular incidence angle was observed over a large range of bias voltages. The timing resolution was measured using a $16\text{\,}\mathrm{ns}$ binning. Correction for a time-walk and for the systematic delay of each row of the sensor was applied offline. A timing resolution $\sigma_{t}$ of $7.2\text{\,}\mathrm{ns}$ (RMS) is achieved. Taking into account the TOA binning and the lack of time structure in the CERN SPS beam, a fit of a box function convoluted to a Gaussian function was performed. For a fixed box width corresponding to the TOA binning, an intrinsic resolution for the pre-amplifier and discriminator of $5.6\text{\,}\mathrm{ns}$ can be extracted.

4 Conclusion

The CLICdp vertex and tracker R&D focuses on identifying the most promising technologies for the realization of a detector meeting CLIC physics requirements. The CLICdp Timepix3 telescope and the CARiBOu readout system were developed to efficiently perform characterization of the prototypes in test-beams and in laboratory. TCAD simulations, in combination with the Allpix2 framework, have been developed and used to gain understanding of current and future prototypes. The CLICpix2 ASIC was developed, meeting CLIC specifications, and studied using planar and CCPD sensors developed by the collaboration. Monolithic sensors with small and large fill-factor electrodes were simulated and characterized and the obtained results show good agreement with the simulation. Further prototypes fulfilling further the CLIC vertex and tracker requirements are designed and being produced.

Acknowledgments

This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 654168.