# Pixel detector R&D for the Compact Linear Collider

## TL;DR

This paper reviews the R&D efforts on pixel detectors for the CLIC collider, highlighting innovative sensor technologies, readout ASICs, and simulation tools to meet demanding spatial, timing, and material requirements.

## Contribution

It presents recent developments in hybrid and monolithic silicon pixel detectors, including new ASICs and sensor integration techniques, for high-performance vertex and tracking detectors at CLIC.

## Key findings

- Successful production of CLICpix2 ASICs in 65nm CMOS.
- Development of monolithic prototypes in HR-CMOS, HV-CMOS, and SOI.
- Positive test-beam and simulation results demonstrating detector performance.

## Abstract

The physics aims at the proposed future CLIC high-energy linear $e^+ e^-$ collider pose challenging demands on the performance of the detector system. In particular the vertex and tracking detectors have to combine precision measurements with robustness against the expected high rates of beam-induced backgrounds. A spatial resolution of a few microns and a material budget down to 0.2\% of a radiation length per vertex-detector layer have to be achieved together with a few nanoseconds time stamping accuracy. These requirements are addressed with innovative technologies in an ambitious detector R\&D programme, comprising hardware developments as well as detailed device and Monte Carlo simulations based on TCAD, Geant4 and Allpix-Squared. Various fine pitch hybrid silicon pixel detector technologies are under investigation for the CLIC vertex detector. The CLICpix and CLICpix2 readout ASICs with \SI{25}{\micro\meter} pixel pitch have been produced in a \SI{65}{\nano\meter} commercial CMOS process and bump-bonded to planar active edge sensors as well as capacitively coupled to High-Voltage (HV) CMOS sensors. Monolithic silicon tracking detectors are foreseen for the large surface ($\approx$ \SI{140}{\meter\squared}) CLIC tracker. Fully monolithic prototypes are currently under development in High-Resistivity (HR) CMOS, HV-CMOS and Silicon on Insulator (SOI) technologies. The laboratory and beam tests of all recent prototypes profit from the development of the CaRIBou universal readout system. This talk presents an overview of the CLIC pixel-detector R\&D programme, focusing on recent test-beam and simulation results.