Efficient Synthesis of Linear Reversible Circuits

TL;DR

This paper introduces an asymptotically optimal and significantly faster algorithm for synthesizing linear reversible circuits with fewer gates, improving over traditional Gaussian elimination methods.

Contribution

The paper presents a novel algorithm that reduces circuit size to near the information-theoretic lower bound and is Theta(log n) times faster than existing approaches.

Findings

Algorithm achieves asymptotic optimality in gate count.

Simulation shows improved efficiency for small n.

Faster synthesis compared to standard methods.

Abstract

In this paper we consider circuit synthesis for n-wire linear reversible circuits using the C-NOT gate library. These circuits are an important class of reversible circuits with applications to quantum computation. Previous algorithms, based on Gaussian elimination and LU-decomposition, yield circuits with O(n^2) gates in the worst-case. However, an information theoretic bound suggests that it may be possible to reduce this to as few as O(n^2/log n) gates. We present an algorithm that is optimal up to a multiplicative constant, as well as Theta(log n) times faster than previous methods. While our results are primarily asymptotic, simulation results show that even for relatively small n our algorithm is faster and yields more efficient circuits than the standard method. Generically our algorithm can be interpreted as a matrix decomposition algorithm, yielding an asymptotically efficient decomposition of a binary matrix into a product of elementary matrices.