Benchmarking and tuning the MILC code on clusters and supercomputers

TL;DR

This paper benchmarks and optimizes the MILC code across various high-performance computing architectures, demonstrating significant speedups through simple code modifications tailored to advanced memory systems.

Contribution

It provides a comprehensive benchmarking and tuning methodology for the MILC code on diverse architectures, highlighting effective code changes for performance improvements.

Findings

Significant speedups achieved with simple code modifications

Performance benchmarks across multiple architectures including Itanium, PIV, Athlon, Alpha

Insights into optimizing code for advanced memory systems

Abstract

Recently, we have benchmarked and tuned the MILC code on a number of architectures including Intel Itanium and Pentium IV (PIV), dual-CPU Athlon, and the latest Compaq Alpha nodes. Results will be presented for many of these, and we shall discuss some simple code changes that can result in a very dramatic speedup of the KS conjugate gradient on processors with more advanced memory systems such as PIV, IBM SP and Alpha.