Status of the QCDOC project
P.A. Boyle, D. Chen, N.H. Christ, C. Cristian, Z. Dong, A. Gara, B., Jo\'o, C. Kim, L. Levkova, X. Liao, G. Liu, R.D. Mawhinney, S. Ohta, T., Wettig, A. Yamaguchi
TL;DR
The paper reports on the current status of the QCDOC project, a specialized massively parallel computer for lattice QCD, highlighting hardware/software features and performance metrics from simulation results.
Contribution
It provides an update on the development and performance evaluation of the QCDOC architecture, emphasizing unique hardware/software features and simulation outcomes.
Findings
Performance figures from VHDL design simulations
Unique hardware and software features of QCDOC
Status update on the project development
Abstract
A status report is given of the QCDOC project, a massively parallel computer optimized for lattice QCD using system-on-a-chip technology. We describe several of the hardware and software features unique to the QCDOC architecture and present performance figures obtained from simulating the current VHDL design of the QCDOC chip with single-cycle accuracy.
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