Readout Concepts for DEPFET Pixel Arrays

TL;DR

This paper discusses various readout concepts for DEPFET pixel arrays, highlighting their advantages for fast, low-power, and flexible detection of small signals in imaging and particle detection applications.

Contribution

It introduces and compares different readout methods for DEPFET arrays, including source and drain readout, with examples of VLSI chips for control and data extraction.

Findings

Effective readout schemes for DEPFET arrays are identified.

VLSI chips demonstrate practical implementations of the concepts.

Readout methods enable fast, low-power, and flexible detection.

Abstract

Field effect transistors embedded into a depleted silicon bulk (DEPFETs) can be used as the first amplifying element for the detection of small signal charges deposited in the bulk by ionizing particles, X-ray photons or visible light. Very good noise performance at room temperature due to the low capacitance of the collecting electrode has been demonstrated. Regular two dimensional arrangements of DEPFETs can be read out by turning on individual rows and reading currents or voltages in the columns. Such arrangements allow the fast, low power readout of larger arrays with the possibility of random access to selected pixels. In this paper, different readout concepts are discussed as they are required for arrays with incomplete or complete clear and for readout at the source or the drain. Examples of VLSI chips for the steering of the gate and clear rows and for reading out the columns are presented.