A Delay Analysis of Maximal Matching Switching with Speedup

TL;DR

This paper analyzes the average queue backlog in input-output switches using maximal size matching with speedup, showing performance ratios close to optimal as speedup increases.

Contribution

It provides a quantitative analysis of backlog performance for maximal matching scheduling with speedup, comparing it to optimal switches.

Findings

Backlog with speedup 3 is at most 10/3 times optimal.

Performance ratio approaches 2 as speedup increases.

Analysis applies to switches with many input and output ports.

Abstract

In this paper we analyze the average queue backlog in a combined input-output queued switch using a maximal size matching scheduling algorithm. We compare this average backlog to the average backlog achieved by an optimal switch. We model the cell arrival process as independent and identically distributed between time slots and uniformly distributed among input and output ports. For switches with many input and output ports, the backlog associated with maximal size matching with speedup 3 is no more than 10/3 times the backlog associated with an optimal switch. Moreover, this performance ratio rapidly approaches 2 as speedup increases.