A New Reversible TSG Gate and Its Application For Designing Efficient Adder Circuits

TL;DR

This paper introduces a novel 4x4 reversible TSG gate that simplifies the design of efficient reversible adder circuits, reducing gate count and garbage outputs, and advancing the development of low-power and quantum computing systems.

Contribution

It proposes a new reversible TSG gate that can implement a full adder alone, improving the efficiency of reversible adder architectures compared to existing designs.

Findings

Reversible adder designs with the TSG gate are more optimized.

The TSG gate reduces the number of gates and garbage outputs.

Enhanced potential for complex reversible systems.

Abstract

In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not reversible. This paper proposes a new 4 * 4 reversible gate called TSG gate. The proposed gate is used to design efficient adder units. The most significant aspect of the proposed gate is that it can work singly as a reversible full adder i.e reversible full adder can now be implemented with a single gate only. The proposed gate is then used to design reversible ripple carry and carry skip adders. It is demonstrated that the adder architectures designed using the proposed gate are much better and optimized, compared to their existing counterparts in literature; in terms of number of reversible gates and garbage outputs. Thus, this paper provides the initial threshold to building of more complex system which can execute more complicated operations using reversible logic.