Low-Density Parity-Check Code with Fast Decoding Speed

TL;DR

This paper investigates the design of LDPC codes that enable fast decoding while approaching channel capacity, introducing the flatness condition and an optimization method for codes with concentrated check node degrees.

Contribution

It introduces the flatness condition for capacity-approaching LDPC codes and proposes an optimization approach for designing codes with rapid decoding.

Findings

Density-efficient codes satisfy the flatness condition.

Optimal codes for decoding speed have check node degrees concentrated around the average.

Asymptotic approximation to the number of decoding iterations.

Abstract

Low-Density Parity-Check (LDPC) codes received much attention recently due to their capacity-approaching performance. The iterative message-passing algorithm is a widely adopted decoding algorithm for LDPC codes \cite{Kschischang01}. An important design issue for LDPC codes is designing codes with fast decoding speed while maintaining capacity-approaching performance. In another words, it is desirable that the code can be successfully decoded in few number of decoding iterations, at the same time, achieves a significant portion of the channel capacity. Despite of its importance, this design issue received little attention so far. In this paper, we address this design issue for the case of binary erasure channel. We prove that density-efficient capacity-approaching LDPC codes satisfy a so called "flatness condition". We show an asymptotic approximation to the number of decoding iterations. Based on these facts, we propose an approximated optimization approach to finding the codes with good decoding speed. We further show that the optimal codes in the sense of decoding speed are "right-concentrated". That is, the degrees of check nodes concentrate around the average right degree.