Experimental Software Schedulability Estimation For Varied Processor Frequencies

TL;DR

This paper introduces an experimental method to estimate application schedulability across different processor frequencies using artificial workload, aiding in optimizing dynamic voltage and frequency scaling techniques.

Contribution

It presents a novel approach to estimate schedulability at various frequencies through artificial workload simulation, supporting DVS/DFS control algorithms.

Findings

Effective schedulability estimation across frequencies

Supports dynamic voltage and frequency scaling optimization

Method validated through analysis and evaluation

Abstract

This paper describes a new approach to experimentally estimate the application schedulability for various processor frequencies. We use additional workload generated by an artificial high priority routine to simulate the frequency decrease of a processor. Then we estimate the schedulability of applications at different frequencies. The results of such estimation can be used to determine the frequencies and control algorithms of dynamic voltage scaling/dynamic frequency scaling (DVS/DFS) implementations. The paper presents a general problem description, the proposed schedulability estimation method, its analysis and evaluation.