Verifying Termination and Error-Freedom of Logic Programs with block Declarations

TL;DR

This paper introduces verification methods for logic programs with delay declarations, focusing on ensuring termination and error-freedom, accommodating multiple modes, and considering selection rules in Prolog-like environments.

Contribution

It presents novel approaches to verify termination and error-freedom in logic programs with block declarations, considering multiple modes and realistic selection rules.

Findings

Two approaches for termination verification are proposed.

Block declarations are sufficient to ensure termination and error-freedom.

Methods can verify existing programs and aid in writing new ones.

Abstract

We present verification methods for logic programs with delay declarations. The verified properties are termination and freedom from errors related to built-ins. Concerning termination, we present two approaches. The first approach tries to eliminate the well-known problem of speculative output bindings. The second approach is based on identifying the predicates for which the textual position of an atom using this predicate is irrelevant with respect to termination. Three features are distinctive of this work: it allows for predicates to be used in several modes; it shows that block declarations, which are a very simple delay construct, are sufficient to ensure the desired properties; it takes the selection rule into account, assuming it to be as in most Prolog implementations. The methods can be used to verify existing programs and assist in writing new programs.