Charge Transport in Voltage-Biased Superconducting Single-Electron Transistors

TL;DR

This paper models charge transport in superconducting single-electron transistors at finite bias, highlighting the roles of coherent Cooper-pair tunneling, quasiparticle effects, and environmental influences, with results aligning well with experiments.

Contribution

It provides a comprehensive model that captures the interplay of tunneling processes and parity effects in superconducting single-electron transistors, validated by experimental data.

Findings

Good agreement between model and experimental I-V characteristics

Parity effects cause 2e-periodic current dependence on gate charge

Coherent tunneling and quasiparticle effects are crucial for transport

Abstract

Charge is transported through superconducting SSS single-electron transistors at finite bias voltages by a combination of coherent Cooper-pair tunneling and quasiparticle tunneling. At low transport voltages the effect of an ``odd'' quasiparticle in the island leads to a $2e$-periodic dependence of the current on the gate charge. We evaluate the $I-V$ characteristic in the framework of a model which accounts for these effects as well as for the influence of the electromagnetic environment. The good agreement between our model calculation and experimental results demonstrates the importance of coherent Cooper-pair tunneling and parity effects.