Parallel Core-Shell Metal-Dielectric-Semiconductor Germanium Nanowires for High Current Surround Gate Field Effect Transistors

TL;DR

This paper presents a novel fabrication of surround-gate germanium nanowire FETs with improved electrostatic control, achieving high current outputs, and introduces a self-aligned process applicable to various nanowire materials.

Contribution

It introduces a self-aligned fabrication method for surround-gate Ge nanowire FETs that enhances performance and scalability.

Findings

Individual SG GeNW FETs show improved switching performance.

Parallel SG GeNW FETs achieve over 0.1mA current at low bias.

The self-aligned scheme is adaptable to other semiconductor nanowires.

Abstract

Core-shell germanium nanowire (GeNW) is formed with a single-crystalline Ge core and concentric shells of nitride and silicon passivation layer by chemical vapor deposition (CVD), an Al2O3 gate dielectric layer by atomic layer deposition (ALD) and an Al metal surround-gate (SG) shell by isotropic magnetron sputter deposition. Surround gate nanowire field effect transistors (FETs) are then constructed using a novel self-aligned fabrication approach. Individual SG GeNW FETs show improved switching over GeNW FETs with planar gate stacks owing to improved electrostatics. FET devices comprised of multiple quasi-aligned SG GeNWs in parallel are also constructed. Collectively, tens of SG GeNWs afford on-currents exceeding 0.1mA at low source-drain bias voltages. The self-aligned surround gate scheme can be generalized to various semiconductor nanowire materials.