Impurity conduction in phosphorus-doped buried-channel silicon-on-insulator field-effect transistors
Yukinori Ono, Jean-Francois Morizur, Katsuhiko Nishiguchi, Kei, Takashina, Hiroshi Yamaguchi, Kazuma Hiratsuka, Seiji Horiguchi, Hiroshi, Inokawa, Yasuo Takahashi

TL;DR
This study explores impurity conduction mechanisms in phosphorus-doped silicon-on-insulator transistors, revealing a conductance peak and high-temperature variable-range hopping influenced by band bending and impurity band properties.
Contribution
It demonstrates the emergence of conductance peaks and high-temperature hopping in doped SOI transistors, linking these phenomena to impurity band structure and gate bias effects.
Findings
Conductance peak appears at low temperatures in doped transistors.
Variable-range hopping persists above 100 K, higher than expected.
Conductance features relate to impurity band and DOS characteristics.
Abstract
We investigate transport in phosphorus-doped buried-channel metal-oxide-semiconductor field-effect transistors at temperatures between 10 and 295 K. In a range of doping concentration between around 2.1 and 8.7 x 1017 cm-3, we find that a clear peak emerges in the conductance versus gate-voltage curves at low temperature. In addition, temperature dependence measurements reveal that the conductance obeys a variable-range-hopping law up to an unexpectedly high temperature of over 100 K. The symmetric dual-gate configuration of the silicon-on-insulator we use allows us to fully characterize the vertical-bias dependence of the conductance. Comparison to computer simulation of the phosphorus impurity band depth-profile reveals how the spatial variation of the impurity-band energy determines the hopping conduction in transistor structures. We conclude that the emergence of the conductance…
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