Gate capacitance of back-gated nanowire field-effect transistors

TL;DR

This paper calculates gate capacitances of back-gated nanowire FETs using finite element methods, compares them with analytical models, and discusses effects of embedding, electric field amplification, and nanowire shape.

Contribution

It introduces finite element calculations for gate capacitance in NW-FETs and evaluates the accuracy of analytical models for different configurations.

Findings

Analytical models underestimate carrier mobilities in non-embedded NW-FETs.

Non-embedded NW-FETs exhibit electric field amplification.

Cross-section shape influences gate capacitance and device performance.

Abstract

Gate capacitances of back-gated nanowire field-effect transistors (NW-FETs) are calculated by means of finite element methods and the results are compared with analytical results of the ``metallic cylinder on an infinite metal plate model''. Completely embedded and non-embedded NW-FETs are considered. It is shown that the use of the analytical expressions also for non-embedded NW-FETs gives carrier mobilities that are nearly two times too small. Furthermore, the electric field amplification of non-embedded NW-FETs and the influence of the cross-section shape of the nanowires are discussed.