Power dissipation in spintronic devices: A general perspective

TL;DR

This paper critically examines spintronic devices, arguing that traditional designs do not significantly reduce power dissipation, and proposes spin-based switching methods that could achieve lower energy use, including revisiting single spin logic.

Contribution

The paper demonstrates that spintronic devices must switch spins of stationary charges rather than move charges to reduce power, and revisits the single spin logic concept with new estimates and engineering ideas.

Findings

Single Spin Switch outperforms Spin FET in power dissipation

Matrix element engineering can bypass the thermodynamic energy limit

Reversible logic implementations are briefly discussed

Abstract

Champions of spintronics often claim that spin based signal processing devices will vastly increase speed and/or reduce power dissipation compared to traditional charge based electronic devices. Yet, not a single spintronic device exists today that can lend credence to this claim. Here, I show that no spintronic device that clones conventional electronic devices, such as field effect transistors and bipolar junction transistors, is likely to reduce power dissipation significantly. For that to happen, spin-based devices must forsake the transistor paradigm of switching states by physical movement of charges, and instead, switch states by flipping spins of stationary charges. An embodiment of this approach is the single spin logic idea proposed more than 10 years ago. Here, I revisit that idea and present estimates of the switching speed and power dissipation. I show that the Single Spin Switch is far superior to the Spin Field Effect Transistor (or any of its clones) in terms of power dissipation. I also introduce the notion of matrix element engineering which will allow one to switch devices without raising and lowering energy barriers between logic states, thereby circumventing the kTln2 limit on energy dissipation. Finally, I briefly discuss single spin implementations of classical reversible (adiabatic) logic.