A Theoretical Investigation of Surface Roughness Scattering in Silicon Nanowire Transistors

TL;DR

This paper uses 3D quantum mechanical simulations to analyze how surface roughness scattering impacts silicon nanowire transistors, revealing effects on electron density, threshold voltage, and mode dependence.

Contribution

It introduces a 3D finite element simulation approach to directly model microscopic interface roughness effects in Si nanowire transistors.

Findings

Surface roughness scattering reduces the electron density of states.

SRS increases the threshold voltage of SNWTs.

SRS is more significant when more propagating modes are occupied.

Abstract

In this letter, we report a three-dimensional (3D) quantum mechanical simulation to investigate the effects of surface roughness scattering (SRS) on the device characteristics of Si nanowire transistors (SNWTs). We treat the microscopic structure of the Si/SiO2 interface roughness directly by using a 3D finite element technique. The results show that 1) SRS reduces the electron density of states in the channel, which increases the SNWT threshold voltage, and 2) the SRS in SNWTs becomes more effective when more propagating modes are occupied, which implies that SRS is more important in planar metal-oxide-semiconductor field-effect-transistors with many transverse modes occupied than in small-diameter SNWTs with few modes conducting.