Nanoengineered Curie Temperature in Laterally-Patterned Ferromagnetic Semiconductor Heterostructures

TL;DR

This study demonstrates that nanolithography patterning of (Ga,Mn)As layers enhances the Curie temperature by exposing free surfaces that facilitate Mn interstitial removal during annealing, with narrower wires showing greater effects.

Contribution

It introduces a nanoengineering approach to control the Curie temperature in ferromagnetic semiconductors through patterning and annealing.

Findings

Enhanced Curie temperature in patterned nanowires.

Greater temperature increase in narrower nanowires.

Reduced resistivity compared to unpatterned samples.

Abstract

We demonstrate the manipulation of the Curie temperature of buried layers of the ferromagnetic semiconductor (Ga,Mn)As using nanolithography to enhance the effect of annealing. Patterning the GaAs-capped ferromagnetic layers into nanowires exposes free surfaces at the sidewalls of the patterned (Ga,Mn)As layers and thus allows the removal of Mn interstitials using annealing. This leads to an enhanced Curie temperature and reduced resistivity compared to unpatterned samples. For a fixed annealing time, the enhancement of the Curie temperature is larger for narrower nanowires.