Fabrication of Conducting Si Nanowire Arrays
E. Johnston-Halperin, R. A. Beckman, N. A. Melosh, Y. Luo, J. E., Green, and J. R. Heath

TL;DR
This paper presents a novel fabrication method for highly regular, ultra-narrow silicon nanowire arrays with low resistivity, enabling advanced nano-electronic applications such as sensors and dense transistor arrays.
Contribution
It introduces a fabrication process for conducting silicon nanowire arrays with precise dimensions and low resistivity, advancing nano-electronic device manufacturing.
Findings
Nanowire widths of 10-20 nm achieved
Resistivity comparable to bulk silicon
Potential for nano-electronic device integration
Abstract
The recent development of the superlattice nanowire pattern transfer (SNAP) technique allows for the fabrication of arrays of nanowires at a diameter, pitch, aspect ratio, and regularity beyond competing approaches. Here, we report the fabrication of conducting Si nanowire arrays with wire widths and pitches of 10-20 nm and 40-50 nm, respectively, and resistivity values comparable to the bulk through the selection of appropriate silicon-on-insulator substrates, careful reactive-ion etching, and spin-on glass doping. These results promise the realization of interesting nano-electronic circuits and devices, including chemical and biological sensors, nano-scale mosaics for molecular electronics, and ultra-dense field-effect transistor (FET) arrays.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsNanowire Synthesis and Applications · Anodic Oxide Films and Nanostructures · Semiconductor materials and devices
