Analysis of integrated single-electron memory operation

TL;DR

This paper analyzes key mechanisms and architectures for single-electron memory, including charging processes, background charge compensation, and defect-tolerant design, advancing the understanding of reliable nanoscale memory systems.

Contribution

It introduces novel ideas for background charge compensation and defect-tolerant architecture in single-electron memory devices.

Findings

Analysis of Fowler-Nordheim tunneling in single-electron charging

Proposal of background charge compensation method

Discussion of defect-tolerant nanofuse architecture

Abstract

Various aspects of single-electron memory are discussed. In particular, we analyze the single-electron charging by Fowler-Nordheim tunneling, propose the idea of background charge compensation, and discuss the defect-tolerant architecture based on nanofuses.