# A learnable parallel processing architecture towards unity of memory and computing

## TL;DR

This paper introduces a new computing architecture called iMemComp that unifies memory and processing to save energy and improve performance.

## Contribution

The novel contribution is a non-von Neumann architecture using resistive switching devices for parallel computing and learning.

## Key findings

- The iMemComp architecture eliminates energy-hungry data movement by unifying memory and computing.
- Adder circuits using iMemComp improve speed by 76.8% and reduce power dissipation by 60.3%.
- The architecture achieves a 700 times reduction in circuit area compared to silicon-based systems.

## Abstract

Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named “iMemComp”, where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped “iMemComp” with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on “iMemComp” can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.