# Micro-LED/van der Waals heterointegration for in-pixel processing display architecture

## TL;DR

This paper introduces a new display architecture that combines micro-LEDs and in-memory computing to enable fast, energy-efficient image processing directly within each pixel.

## Contribution

The novel integration of micro-LEDs with MoS2 in-memory transistors for in-pixel processing in a compact display array.

## Key findings

- The display achieves high luminance (>3 × 10⁵ cd·m⁻²) and high-speed operation (5000 Hz).
- In-situ image reconstruction and real-time display are demonstrated using the in-pixel processing design.
- Reconstructed images achieved 99.29% accuracy in a neural network-based recognition task.

## Abstract

The rapid evolution of intelligent display technologies is driving the development of next-generation edge smart systems, yet conventional off-pixel processing architectures suffer from severe display latency and energy bottlenecks. Embedding in-memory computing features into pixel-level active drivers presents a promising strategy for co-locating image processing and display. In this work, we provide an in-pixel processed display-driven architecture that integrates micro-LEDs with MoS2 in-memory transistors into a 16 × 16 active display array. Our in-pixel processing design exhibits high luminance (>3 × 105 cd·m⁻2), high-speed operation (5000 Hz), and compact dimensions of 20 × 35 μm per pixel. Crucially, leveraging the segmented voltage-luminance response and the non-volatile multilevel conductance update characteristics of the design devices, we demonstrate in-situ image reconstruction and real-time display using in-pixel processed micro-LED arrays. The image reconstruction capability of the proposed design is validated through a neural network-based image recognition task, where the inference process is implemented directly on the pixel array by deploying the trained weights via non-volatile conductance modulation. The reconstructed images achieved a significantly higher accuracy of 99.29% compared to the original inputs (79.81%). These results highlight the significance of the in-pixel processed display architecture as a promising approach to realize high-performance intelligent display technologies.

Integrating in-memory computing features into pixel-level active drivers presents a promising strategy for intelligent display applications. Here, the authors report the fabrication of in-pixel processing active display arrays integrating micro-LEDs with 2D MoS2 in-memory transistors, showing small footprint, up to 5 kHz operation speed and > 3 × 105 cd·m⁻2 luminance.