Stack-Engineered Mode Selection in PtMn/(Co/Pd)n Multilayers Enables Deterministic Analog Spin–Orbit Torque Synapses
Abhijeet Ranjan, Tamkeen Farooq, Chong-Chi Chi, Chao-Chin Wang, Yu-Lon Lin, Rudis Ismael Salinas Padilla, Ying-Hung Li, Yuan-Chieh Tseng, Chih-Hao Lee, Ming-Yen Lu, Rahul Mishra, Chih-Huang Lai
TL;DR
This paper shows how adjusting the structure of a material can control the switching behavior of spintronic devices for efficient neuromorphic computing.
Contribution
The study introduces stack-engineered mode selection to enable deterministic analog spin–orbit torque synapses.
Findings
For nCo/Pd ≤ 7, binary switching transitions to analog behavior through electrical conditioning.
For nCo/Pd ≥ 8, analog switching is stabilized without additional processing.
Hybrid tuning improves neuromorphic classification accuracy to over 97%.
Abstract
Spin–orbit-torque (SOT) devices that support both binary and analog switching can bridge spintronic memory and neuromorphic computing, provided the switching mode can be deliberately assigned. Here, we demonstrate that in PtMn/(Co/Pd)n multilayers, the Co/Pd repeat number, nCo/Pd, serves as a material parameter that determines the reversal mechanism and switching mode. For nCo/Pd ≤ 7, magnetization reversal is governed by nucleation followed by domain-wall propagation, resulting in binary switching that can undergo a transition to analog behavior through electrical conditioning. For nCo/Pd ≥ 8, increased structural modulation in the as-deposited state suppresses domain-wall propagation and stabilizes nucleation-dominated analog switching without additional processing. Applying controlled current conditioning to these high-nCo/Pd stacks produces a hybrid state with smoother long-term…
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7- —National Science and Technology Council10.13039/501100020950
- —National Science and Technology Council10.13039/501100020950
- —National Science and Technology Council10.13039/501100020950
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Taxonomy
TopicsMagnetic properties of thin films · Advanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices
Introduction
1
Neuromorphic computing aims to overcome the energy and data-transfer bottlenecks of conventional von Neumann architectures by colocating memory and computation. Spintronic devices are attractive candidates because they offer nonvolatility, low-power operation, high endurance, and CMOS compatibility. ?−? ? ? ? ? ? ? ? ? Among them, spin–orbit torque (SOT) devices enable efficient electrical control of magnetization using in-plane current, supporting fast and reliable write operations. ?−? ? ? ? ? ? ? ? ? Depending on the magnetization-reversal pathway, SOT devices can exhibit either binary or analog switching. ?−? ? ?,?−? ? ? ? Binary switching is well-suited for digital storage and neuron-like functionalities, whereas analog switching enables gradual, incremental weight updates required for synaptic learning. ?−? ? ? ? ? ? ? ? ? ? ? ? ? Consequently, scalable neuromorphic hardware requires strategies that can deliberately assign and, ideally, tune the switching mode within a unified materials platform. ?−? ? ? ?
Recent studies have demonstrated that the SOT switching characteristics significantly impact neuromorphic performance. For example, Guo et al. achieved multilevel states in Pt/Co/Ta heterostructures and demonstrated a classification accuracy of 93.38% in a convolutional neural network task.? Yadav et al. used gradient multilayers in Pt/Co-based SOT devices to access numerous stable states while maintaining thermal stability, achieving 92.2% accuracy.? Topological-insulator-based SOT neurons and synapses have also achieved ultralow switching current densities with high recognition performance.? These results emphasize that neuromorphic performance is tightly linked to how precisely the magnetic state can be incrementally and reproducibly updated.
A key materials question is how to deliberately favor nucleation-dominated analog switching over domain-wall-propagation-driven binary switching. Wan et al. induced a gradual switching in Pt/Co/MgO by focused ion-beam illumination, which locally softens the magnetic properties, thereby increasing the number of nucleation events and intermediate states.? In a complementary direction, Zhou et al. reported field-free, nucleation-dominated SOT switching in an L1_1_-CuPt/CoPt bilayer and used the resulting intermediate states to implement a sigmoidal spintronic neuron for MNIST classification; they attributed the nucleation-dominated behavior at H_x_ = 0 to DMI-fixed Néel-wall chirality that suppresses deterministic domain-wall propagation and to spatially distributed nucleation barriers E_n_, such that switching progresses mainly through additional nucleation rather than propagation.? These works highlight that engineering microstructure and local energy landscapes can promote analog-like SOT responses, but they typically rely on postfabrication modification or specific material systems and do not directly provide a fabrication-time parameter to deterministically assign the switching mode. ?,?,?,?,?−? ?
Related approaches based on stacking periodicity and AFM/FM coupling further illustrate the role of microstructure and domain statistics. In Co/Pt multilayers, multilevel states can be achieved through multidomain formation where the final magnetization can be programmed by pulse conditions in an initialization-free manner.? In PtMn/[Co/Ni], analog-like (memristive) switching has been linked to exchange bias and grain-scale variations that inhibit domain-wall propagation, yielding stable intermediate multilevel states. ?,?,? In addition, electrical or thermal treatments can modify defect distributions and convert binary to analog switching in PtMn/(Co/Pd)4,? but such postgrowth conditioning is applied only after fabrication and can introduce variability across devices. For synaptic functionality, it is also essential to maintain a large number of stable intermediate states while achieving linear and symmetric long-term potentiation and depression. ?−? ? ? ?,?−? ?
Here, we demonstrate that the Co/Pd repeat number, n_Co/Pd_, in PtMn/(Co/Pd)n multilayers provides a materials-level, fabrication-time structural parameter that deterministically selects the SOT switching mode. By tuning n_Co/Pd_ from 2 to 9, we show that devices with n_Co/Pd_ ≤ 7 exhibit binary switching in the as-deposited state that can be converted to analog behavior through controlled electrical conditioning, whereas devices with n_Co/Pd_ ≥ 8 display analog switching already in the as-deposited state. Transmission electron microscopy and Kerr imaging reveal that increasing n_Co/Pd_ systematically modifies the multilayer structural modulation and the domain-wall pinning environment, correlating with a crossover from domain-wall-propagation-driven reversal to nucleation-dominated analog switching. Furthermore, mild current conditioning of high-n_Co/Pd_ stacks produces a hybrid state with smoother and more symmetric synaptic updates, an expanded number of intermediate states, and recognition accuracy exceeding 97% on the MNIST data set. These results establish stack design and hybrid tuning as scalable routes to thermally stable and energy-efficient analog SOT synapses for neuromorphic computing.
Experimental and Methods
2
Si/SiO_2_//Ta(3)/Pt(2.5)/Pt_50_Mn_50_(20)/[Co(0.25)/Pd(0.66)]n/Ta(5) (thickness in nm) multilayers were fabricated on Si/SiO_2_ substrates using magnetron sputtering. The stack consisted of Ta (3 nm) for adhesion and Pt (2.5 nm) to promote Pt_50_Mn_50_ (111) texture. The Pt_50_Mn_50_ (20 nm) and Ta (5 nm) layers serve as the spin current source; the ferromagnetic layer is composed of [Co(0.25 nm)/Pd(0.66 nm)]n with n_Co/Pd_ = 2–9. Ta (5 nm) is also used for the capping. Film thicknesses were verified by atomic force microscopy (AFM). All deposits were performed in an Ar atmosphere at room temperature (base pressure <2 × 10^–7^ Torr). Magnetic properties were measured using a vibrating sample magnetometer (VSM) and a superconducting quantum interference device (SQUID). Hall cross devices (10 μm × 40 μm) were patterned by photolithography and etched using Ar ion milling down to the SiO_2_ substrate. After the device fabrication, all the SOT measurements were performed using 300 μs long pulses unless stated otherwise. High-resolution transmission electron microscopy (HRTEM) imaging was performed with a spherical-aberration-corrected field-emission electron microscope (JEM ARM-200FTH) for structural analysis.
Results and Discussion
3
Property Evolution with Co/Pd Repeat Number
3.1
Figurea demonstrates the schematic of the heterostructure used in this study. The magnetic properties of each of these as-deposited heterostructures are shown in Figureb–?d. As shown in Figureb, each loop exhibits robust perpendicular magnetic anisotropy, as evidenced by M_R_/M_S_ = 1 in each case. As n_Co/Pd_ increases, net magnetization increases. The saturation magnetization was larger than that of bulk Co due to the induced magnetization in the Pd layers. The variation of coercivity (H_C_) with n_Co/Pd_ is shown in Figurec; it increases linearly up to n_Co/Pd_ = 6, and then increases gradually. The anisotropy field (H_K_) also scales nearly linearly with n_Co/Pd_, as shown in Figured, because the number of Co/Pd interfaces increases as n_Co/Pd_ increases, consistent with the previous report.? Note that all the films are as-deposited films without any postannealing, so we do not build any exchange bias along any direction. The increase in coercivity can be attributed to either the increase in uniaxial anisotropy or the enhanced wall-pinning effect resulting from the accumulation of structural defects at the interfaces with increasing Co/Pd repeats.? Figuree shows an optical micrograph of the fabricated Hall cross devices along with the schematic of the measurement setup used for SOT characterization, where the anomalous Hall effect (AHE) serves as the readout signal. The micron-scale Hall cross structures exhibit robust perpendicular magnetic anisotropy (PMA), as confirmed by the square-shaped field-dependent AHE loops presented in Figuref.
Magnetic Properties of PtMn/(Co/Pd)n=2–9. (a) The schematics of the heterostructures used in this study, (b) Out-of-plane M–H loops showing robust perpendicular magnetic anisotropy (PMA) and high squareness for all nCo/Pd, (c) Coercivity HC versus Co/Pd repeat number nCo/Pd, (d) Anisotropy field HK versus Co/Pd repeat number nCo/Pd, (e) Optical micrograph of a fabricated Hall-cross device and the SOT measurement schematic using the anomalous Hall effect (AHE) as the readout. (f) Field-swept AHE loops for each device, confirming that PMA is preserved after device fabrication.
Switching Pathways: Nucleation vs Domain-Wall
Propagation
3.2
We performed SOT switching measurements for all devices with n_Co/Pd_ = 2–9, applying current pulses of 300 μs width while incrementally increasing the current amplitude and reading the magnetization state after each pulse. Also note that an in-plane field H_X_ = 40 Oe was applied during the SOT switching throughout. For n_Co/Pd_ = 2–7, the devices reproducibly exhibited dual SOT switching behavior, consistent with previously reported results? for n_Co/Pd_ = 4. A representative example for n_Co/Pd_ = 5 is shown in Figurea–?d. As shown in Figurea, reversible magnetization switching between up and down states occurs at ±70 mA under a modest in-plane assist field H_x_ = 40 Oe. The switching polarity corresponds to the spin Hall effect (SHE), which is generated by the bottom PtMn layer and/or top Ta layer, with negligible spin contribution from the thin Pd spacer. The sharp, binary nature of the loop is characteristic of domain-wall nucleation and propagation, which drives the reversal in conventional heavy-metal/ferromagnet systems. The SOT efficiency and DMI field were measured by using a loop shift method for a representative device n_Co/Pd_ = 5. The efficiency value is 0.235, slightly higher or comparable to those reported for PtMn earlier, ?,? suggesting that the top Ta layer may partially contribute to the spin current source. The DMI field was found to be approximately 50 Oe, which scales well with the low H_X_ required for SOT switching in our system. The contribution of PtMn and Ta to SOT switching is discussed in detail in the Supporting Information S1.
Dual SOT switching modes observed in PtMn/(Co/Pd)n=2–7; (a–d) Representative dual SOT mode for nCo/Pd = 5. (a) Current driven binary SOT (±70 mA) switching under HX = 40 Oe, (b) Change of current channel resistance (RXX) with the input current along the current channel (RXX), (c) AHE loop by field switching before and after current treatment, (d) Analog SOT switching under HX = 40 Oe after large current treatment (85 mA), (e) Variations of resistance along the current channel (RXX) for the device with nCo/Pd = 2– 7 after a large current treatment, and (f) The difference between the current required to have binary SOT switching and the current required to cause the transition from the binary SOT mode to multilevel SOT mode (ΔI) for nCo/Pd = 2–7. The pulse width is 300 μs for each pulse during SOT switching.
Upon increasing the current amplitude while maintaining the 300 μs pulse width, a transition is observed near 85 mA, as evidenced by an increase in the longitudinal resistance R_xx_ (Figureb). The transition current magnitude is defined as |I_transition_|. Comparing the field-swept AHE loops before and after this high-current treatment (Figurec) reveals enhanced coercivity and a sheared, slanted loop shape, signatures of structural modification and increased domain wall pinning. Following this irreversible transition, the magnetization switches gradually, producing multilevel, analog SOT characteristics as shown in Figured. The same dual SOT behavior was also observed using shorter pulses (10 μs) and is shown in Supporting Information S2 for representative devices.
The origin of this transition mirrors earlier findings for n_Co/Pd_ = 4: high-current treatment induces twin formation in Co/Pd and PtMn layers, creating pinning sites that hinder domain-wall propagation.? Consequently, magnetization reversal becomes nucleation-dominated, producing stable analog switching. Before the current treatment, the absence of such twin defects allows efficient domain-wall motion, resulting in binary switching.? Figurese summarize the change of the longitudinal resistance change (ΔR_xx_(n)) for each n_Co/Pd_ = 2–7 where ΔR_XX_(n) = R_xx,after_ – R_xx,before_; R_xx,before_ is measured in the pristine binary regime using a small DC read current (well below the switching threshold), and R_xx,after_ is measured after the irreversible transition (i.e., after applying |I_transition_|) under the same readout conditions while Figuref summarizes the difference between the current required to have binary SOT switching and the current required to cause the transition from the binary mode to multilevel SOT mode (ΔI), where ΔI is defined as ΔI(n) = |I_transition_(n)| – |I_binary_(n)| for each n_Co/Pd_ = 2–7. This quantity represents a practical current “guard band” separating binary-mode operation from the onset of the analog regime under the same pulse width. The reported values of ΔR_XX_ and ΔI(n) in Figuree and ?f are averaged across multiple devices and are plotted with corresponding error bars.
For n_Co/Pd_ = 2–7, a larger ΔI provides a wider guard band that maintains binary stability against write-current fluctuations, whereas a smaller ΔI implies a more fragile binary state. Reduction in ΔI with increasing n_Co/Pd_ directly follows the rise in twin density observed in HRTEM images (will be shown below in Figure): as n_Co/Pd_ increases, the higher density of twin-induced pinning centers suppresses long-range domain-wall propagation, lowering the current required to enter the nucleation-dominated (analog) regime. The corresponding change in device resistance (ΔR_XX_(n)) follows a similar trend. The pristine resistance R_XX_ decreases with n_Co/Pd_ due to increased film thickness. In contrast, current treatment increases R_XX_ via twin formation, intermixing, and interface shear, which introduce additional scattering. For n_Co/Pd_ = 2–7, ΔR_XX_(n) increases monotonically (∼6 Ω to ∼22 Ω), reflecting greater available Co/Pd interface area for defect formation. These results confirm that dual SOT modes persist up to n_Co/Pd_ = 7 with the same microscopic mechanism as in previous work,? while also demonstrating the tunability of SOT behavior through controlled current excitation and selecting a device that can both protect the binary mode against maximum fluctuation and provide the best analog behavior. This provides a powerful route to engineer reconfigurable spintronic devices capable of toggling between binary (memory-like or neuronal) and analog (synaptic) operations within the same structure, thereby enhancing flexibility for neuromorphic computing architectures.
Deterministic Mode Selection via Co/Pd Repeat
Number
3.3
With increasing the number of repeat (n_Co/Pd_ = 8 and 9), we observed purely multilevel (analog) SOT switching even in the as-deposited state, without requiring any high-current or thermal treatment. Figurea and ?b show representative current-induced switching curves for n_Co/Pd_ = 8 and n_Co/Pd_ = 9, respectively, both exhibiting gradual, nonabrupt resistance evolution characteristic of analog behavior. The in situ Kerr image in Figurec for the as-fabricated device with n_Co/Pd_ = 8 further confirms that magnetization reversal proceeds via nucleation-dominated switching and/or suppressed propagation, leading to analog SOT switching. The reversal dynamics for the as-fabricated device with n_Co/Pd_ = 8 is distinct from those observed in the as-fabricated device with n_Co/Pd_ = 5, shown in Figured, where we can clearly see switching takes place via nucleation of an opposite domain, which propagates very fast upon increasing current. This contrasts sharply with the dual-mode behavior observed for n_Co/Pd_ = 2–7, where devices initially exhibit sharp binary SOT switching but transition to analog behavior only after high-current treatment.
Analog-only SOT switching in as-fabricated PtMn/(Co/Pd)n=8–9 devices. (a) Multilevel (analog) SOT switching for nCo/Pd = 8, (b) Multilevel (analog) SOT switching for nCo/Pd = 9, (c) In-situ Kerr microscopy for nCo/Pd = 8 showing nucleation-dominated/suppressed propagation reversal with limited domain-wall propagation, and (d) Kerr imaging of the nCo/Pd = 5 device depicting SOT switching by nucleation and propagation. Each pulse is 300 μs long, and HX = 40 Oe for both SOT switching and in situ Kerr imaging.
The dual SOT modes observed in the devices with for n_Co/Pd_ = 2–7 originate from current-induced twin formation and defect-mediated pinning due to the large current treatment.? By increasing the number of Co/Pd repeats alone, we demonstrate that we can stabilize the analog SOT regime in the as-fabricated devices. The increased repeats with thicker stacks likely accumulate a higher twin defect density, which enhances pinning and thereby suppresses domain-wall propagation, favoring nucleation-driven reversal from the outset. Thus, by controlling the multilayer architecture rather than relying on postprocessing, we can deterministically select analog behavior, providing a straightforward materials-level handle for designing robust spintronic synapses. This n_Co/Pd_ dependent mode selection also exists at shorter pulses, as shown in Supporting Information S3 using 10 μs long pulse SOT measurements of representative devices n_Co/Pd_ = 3, 5 (binary SOT in as-deposited devices) and n_Co/Pd_ = 8 (analog SOT in as-deposited devices).
Hybrid Structural–Electrical Tuning
of High-n Multilayers
3.4
To further examine how current treatment influences the analog SOT behavior in already analog-only as-fabricated devices (n_Co/Pd_ = 8 and 9), we applied progressively higher current amplitudes until a measurable increase in the channel resistance (R_xx_) was detected, indicating structural modification. Figurea presents the evolution of R_xx_ with increasing current for both n_Co/Pd_ = 8 and 9. Figureb and ?c show the SOT switching curves after this high-current treatment for n_Co/Pd_ = 8 and n_Co/Pd_ = 9 respectively. Compared to the pristine analog behavior shown previously in Figurea and ?b, the post-treatment devices exhibit a much more gradual resistance evolution and a significantly larger number of intermediate states, indicating an enhanced analog SOT response.
Hybrid control of analog SOT in PtMn/(Co/Pd)n=8,9. (a) Evolution of longitudinal resistance Rxx with increasing current amplitude for each nCo/Pd = 8, and nCo/Pd = 9. (b, c) Enhanced analog SOT switching after high-current treatment for nCo/Pd = 8 and nCo/Pd = 9, respectively, showing more gradual resistance change and an increased number of intermediate states compared with pristine analog devices. (d) Summary of resistance change (ΔRXX) and the additional current (ΔI) required to achieve the hybrid regime for samples with nCo/Pd = 8 and nCo/Pd = 9. All measurements use 300 μs pulses at Hx = 40 Oe.
We term this state the hybrid mode, achieved by combining structural design (via multilayer repeat number) with electrical conditioning. This dual control provides a powerful means to finely tune the analog switching characteristics without compromising device stability. Unlike the analog behavior induced by high-current or annealing treatment in thinner stacks n_Co/Pd_ ≤ 7, where analog behavior arises after a structural change, the hybrid mode in thicker stacks leverages their inherently high pinning density further to refine device analog behavior through controlled current stimulation. Figured summarizes the change in R_xx_ (ΔR_XX_) and the additional current (ΔI) required to achieve the hybrid regime for each n_Co/Pd_ = 8 and 9. For n_Co/Pd_ ≥ 8, the films are intrinsically analog in the as-deposited state; mild current conditioning (ΔI) further enhances twin density (from 0.52 to 0.72 nm^–1^ for n_Co/Pd_ = 8) (as discussed later in Figure), making switching even more gradual and thus enhancing the number of states. In contrast, excessive conditioning eventually overpins the walls and narrows the switching window. For n_Co/Pd_ = 8 and n_Co/Pd_ = 9, ΔR_XX_ remains about ∼9 Ω after current conditioning because the Co/Pd multilayers are already highly twinned, leaving limited headroom for additional defect-induced resistivity changes. Parallel shunting through the Pt/PtMn/Ta layers further constrains the device-level resistance increase. Together, the monotonic decrease in ΔI with n_Co/Pd_ and initial monotonic rise of ΔR_XX_, and then nearly constant at high n_Co/Pd_ confirm that enhanced twin density and interface disorder progressively lower the energetic threshold for nucleation-dominated analog switching, establishing a clear structural–electrical correlation governing the binary-to-analog transition.
Cross-sectional HRTEM images revealing twin evolution vs repeat number and current treatment. (a, b) nCo/Pd = 3 (as-deposited): whole stack and high-magnification images to show CoPd regions with corresponding FFTs. Co/Pd multilayers are smooth and uniform; no visible twins or FFT streakingconsistent with low pinning and binary SOT. (c, d) nCo/Pd = 8 (as-deposited): increased twin boundaries within CoPd (and locally in PtMn); measured CoPd twin density ∼0.52 nm–1. Analog-only SOT is observed in this state. (e, f) nCo/Pd =8 after high-current treatment (hybrid): CoPd has the highest twin density ∼0.72 nm–1 with the most pronounced FFT streaking, indicating enhanced lattice distortion/interface shear; correlates with the most gradual multilevel SOT.
Furthermore, to test the stability and reproducibility of the hybrid-treated devices and to directly evaluate post-treatment robustness under severe operational conditions, we performed an accelerated cycling test on hybrid devices using 100 write pulses (pulse width: 300 μs) with an amplitude of approximately 95 mA, i.e., the current required to complete the switching. After the test, the switching portion decreased only slightly (≈3%) after 100 pulses, without any change in current channel resistance (R_XX_), indicating that the hybrid state is robust against repetitive high-amplitude stressing and does not exhibit rapid degradation. The stability of the multilevel states of these hybrid devices under 100 and 200 writing-pulse thermal stress tests is discussed in detail in Supporting Information S4.
Microstructural Origin of the Mode Crossover
3.5
To reveal the microstructural origin of the observed SOT-mode transition upon increasing n_Co/Pd_ and explain why the hybrid one provides the best analog behavior, we performed cross-sectional HRTEM on three representative stacks: n_Co/Pd_ = 3 (as-deposited), n_Co/Pd_ = 8 (as-deposited), and n_Co/Pd_ = 8 after high-current treatment (hybrid). Figure presents the corresponding low- and high-magnification images as well as FFT patterns. All samples maintain a well-textured (111)-oriented PtMn antiferromagnetic layer and columnar multilayer stacking with sharp interfaces. From the Fast Fourier Transforms (FFTs) and lattice imaging, we also verify that the Co and Pd multilayers form an L1_0_-ordered Co_50_Pd_50_ alloy with a tetragonal crystal lattice (P4/mmm) in all samples. It has been previously shown that Co and Pd are more likely to form alloys rather than remain as superlattices.?
Besides TEM analysis of n_Co/Pd_ = 8 (without any current treatment), we also performed TEM n_Co/Pd_ = 8 (Hybrid) analysis to see if the improved analog behavior in the hybrid case is due to enhancement of twin defects after current treatment as previous study had established that current-induced twin formation within Co/Pd and PtMn layers is the microscopic origin of the binary-to-analog SOT transition.? There, the transition occurred solely via electrical conditioning without altering stack layer or device geometry contingent upon current treatment, directly linking twin-induced domain pinning to nucleation-dominated analog switching. Here, we extend that understanding to test whether a purely structural route, i.e., varying the Co/Pd repeat number n_Co/Pd_ and then further applying the current treatment, can independently modulate twin density and thus control the SOT mode.
For n_Co/Pd_ = 3 (Figurea and ?b), the CoPd layer appears smooth and uniform, and no evident twin contrast or FFT streaking is observed, consistent with low pinning and fast domain-wall propagation that yields binary SOT in the as-deposited state. In contrast, the as-depositedn_Co/Pd_ = 8 film (Figurec and ?d) exhibits a clear increase in twin boundaries within the CoPd region, with a measured twin density ∼0.52 nm^–1^, confirming that microstructural changes with repeat number increase. This enhanced twinning supplies additional pinning sites and explains the analog-only SOT observed without current or thermal treatment in n_Co/Pd_ = 8/9. After controlled high-current conditioning, the n_Co/Pd_ = 8 (hybrid) sample (Figuree and ?f) shows the highest twin density ∼0.72 nm^–1^ and the most pronounced FFT streaking, indicating increased lattice distortion and interface shear. Note that the yellow line marks are representative of twin planes in Figured and ?f. This correlates directly with the most gradual multilevel SOT response (Figure), which exhibits better analog behavior, demonstrating that twin-induced pinning suppresses long-range propagation and promotes nucleation-dominated reversal. The progression n_Co/Pd_ = 3 → 8 → 8 (hybrid), therefore, maps quantitatively onto increasing twin density and analog behavior, extending the previous findings? to include purely structural and hybrid pathways for achieving analog SOT. Besides the HRTEM analysis, the roughness measured by AFM reveals a quite low value (∼100 pm) in all samples. The results are shown in Supporting Information S5. These roughness values indicate that the switching-mode evolution contingent upon increasing n_Co/Pd_ is primarily governed by defect (nucleation-site) density (twin density) increase with n_Co/Pd_ rather than surface roughness.
All samples show a (111)-textured PtMn layer and columnar multilayer stacking; FFTs confirm L10-ordered Co_50_Pd_50_ (P4/mmm) in the Co/Pd region. The yellow line marks represent twin planes. Scale bars: 10 nm (left column) and 2 nm (right column).
Integration with Field-Free SOT Switching
3.6
In this work, we did not perform any annealing, which is typically required in PtMn-based stacks to establish a robust in-plane exchange bias that can serve as an internal symmetry-breaking field for field-free SOT switching.? Our deliberate choice was to demonstrate that deterministic control of SOT switching modes (binary-like vs analog-like) can be achieved in the as-deposited state through a materials-level design parameter, namely the Co/Pd repeat number n_Co/Pd_. This enables cointegration of binary-mode devices and analog synapses within a single deposition/fabrication flow, while still leaving room for optional “hybrid tuning” steps (e.g., annealing/field-cooling and/or current treatment) when field-free operation is desired.
Feasible routes toward field-free switching that are compatible with the PtMn/(Co/Pd)n platform in this work, includes: (i) engineering an in-plane exchange bias in PtMn-based stacks (e.g., via field annealing or field-cooling protocols), ?,? (ii) introducing structural asymmetry (e.g., wedge structures, asymmetric oxidation/capping, or device-level geometric asymmetry),? and (iii) DMI engineering and tilted-anisotropy approaches to provide intrinsic symmetry breaking at zero external field. ?−? ?
Consistent with our TEM-identified increase in twin density with n_Co/Pd_, prior field-driven studies on Co/Pd multilayers have shown that increasing n_Co/Pd_ systematically roughens the domain wall (DW) and alters the reversal pathway. Sharma et al. reported a progression from smooth walls to highly rough, dendritic-like DWs as n_Co/Pd_ increases from 1 to 9, with propagation becoming patchy at large n_Co/Pd_ due to increased DW roughness.? Choe et al. showed that raising the repeat number suppresses wall-motion speed while leaving the nucleation rate comparatively higher, driving a wall-motion to nucleation-dominated crossover. ?,? In parallel, proximity-induced polarization of thin Pd by adjacent Co increases M_S_ as repeats are added, elevating the dipolar energy and lowering the quality factor Q = K_eff_/K_d_; where K_eff_ = M_S_H_K_/2. This reduced Q promotes DW deformation and pinning, further promoting nucleation-dominated reversal at high n_Co/Pd_. ?−? ? Taken together, these reports support our findings: as n_Co/Pd_ grows, enhanced pinning (here, via increased twin density) and DW roughening suppress long-range propagation, yielding the analog-only SOT observed for n_Co/Pd_ ≥ 8, while lower n_Co/Pd_ permits nucleation and propagation, leading to a binary behavior in the as-deposited state. The large current treatment for devices with a lower n_Co/Pd_ enhances the twin formation, resulting in analog behavior.
Synaptic Plasticity and Weight Update Behavior
3.7
We benchmarked synaptic plasticity for analog devices realized by each route, i.e., current treatment, material selection, and hybrid combination, by comparing cycle-to-cycle reproducibility, asymmetry, and nonlinearity. Long-term potentiation/depression (LTP/LTD) is realized while reading the anomalous Hall voltage V_AHE_ as the synaptic weight (Figurea–?c). Starting from −M_z_ and with an in-plane field H_x_ = 40 Oe, we applied 300 μs long pulses separated by 1 s. For LTP, a train of negative pulses with gradually increasing amplitude drove a monotonic rise in V_AHE_; for LTD, a train of positive pulses with increasing amplitudes produced a monotonic decrease. We repeated these write–erase sequences over multiple cycles and compared three representative cases: Figurea is n_Co/Pd_ = 5 after the current treatment (dual-mode device operated in analog), Figureb is n_Co/Pd_ = 8 as-deposited (intrinsically analog), and Figurec is n_Co/Pd_ = 8 after additional current conditioning (hybrid). All three show multilevel updates, with the hybrid sample exhibiting the smoothest evolution and the largest number of intermediate states and thus the best synaptic plasticity.
Synaptic plasticity performance for three analog SOT devices. Repeated LTP/LTD curve depicting the repeatability of the stability, linearity, and symmetry of synaptic weights update for (a) nCo/Pd = 5 with a large current treatment, (b) nCo/Pd = 8 without current treatment, (c) nCo/Pd = 8 (Hybrid, after current treatment). Normalized LTP and LTD curves over various cycles for (d) nCo/Pd = 5 with a large current treatment, (e) nCo/Pd = 8 without current treatment, and (f) nCo/Pd = 8 (Hybrid, after current treatment). Nonlinearity factor (NL) of the LTP/LTD for various measurement cycles for (g) nCo/Pd = 5 with a large current treatment, (h) nCo/Pd = 8 without current treatment, (i) nCo/Pd = 8 (Hybrid, after current treatment). Antisymmetric factor (AF) for various cycles of LTP/LTD measurements for (j) nCo/Pd = 5 with a large current treatment, (k) nCo/Pd = 8 without current treatment, and (l) nCo/Pd = 8 (Hybrid, after current treatment). LTP/LTD were performed under Hx = 40 Oe with a 300 μs-long train of pulses with increasing amplitudes with 1 s spacing between them.
Linearity and symmetry were also quantified over repeated LTP/LTD cycles (Figured–?l) for the above three cases. Normalized LTP and LTD curves over various cycles for n_Co/Pd_ = 5 with a large current treatment, n_Co/Pd_ = 8 without current treatment, and n_Co/Pd_ = 8 (Hybrid, after current treatment) are shown in Figured–?f, respectively. We plotted normalized V_AHE_ versus normalized pulse number and fitted the trajectories using the method given by Chen, Pai-Yu, et al, from which NL_LTP_ and NL_LTD_ were calculated.? The following equations are used to calculate the nonlinearity factor (NL_LTP_ and NL_LTD_).
Here, G _ pot _ and *G_dep_
- are the V_AHE_ values for potentiation and depression, respectively. P is the number of pulses, *P_max_
- is the maximum number of pulses, G _ max _ and G _ min _ are the maximum conductance and the minimum conductance, respectively. Parameter A determines the nonlinear behavior of the synaptic weight update. B is a function of A that fits the functions within the range of *G_max_ *, *G_min_
- and *P_max_ *. According to the lookup table provided by Chen, Pai-Yu et al., the NL_LTP_ and NL_LTD_ are evaluated based on the value of A.?
The symmetry or the antisymmetric factor (AF) of the potentiation and depression curves is determined by calculating the root-mean-square deviation (RMSD) between the LTP and LTD curves using the formulas:
Here, f(x) and g(x) refer to the potentiation and depression plots, respectively. The antisymmetric factor (AF) values indicate asymmetry between the LTP and LTD curves.?
Using the models and equations described earlier, we calculated the Nonlinearity of LTP (NL_LTP_), Nonlinearity of LTD (NL_LTD_), and AF for five LTP/LTD cycles across three device types: current-treated devices (n_Co/Pd_ = 5), material-selected devices (n_Co/Pd_ = 8), without current treatment, and hybrid devices (n_Co/Pd_ = 8), after current treatment. The NL_LTP_ and NL_LTD_ values for each case are plotted in Figureg–?i. For n_Co/Pd_ = 5, the average NL_LTP_ is 0.98 and the average NL_LTD_ is −2.382. For the n_Co/Pd_ = 8 device without current treatment (material-selected), the average NL_LTP_ is 1.032 and the average NL_LTD_ is −2.728. In the hybrid case, with the current treatment (n_Co/Pd_ = 8), the average NL_LTP_ is 0.59 and the average NL_LTD_ is −0.79. The observed difference between Nonlinearity of LTP (NL_LTP_) and Nonlinearity of LTD (NL_LTD_) in the current treated n_Co/Pd_ = 5, and as deposited n_Co/Pd_ = 8 is discussed in detail in Supporting Information S6.
The AF values for the three cases are plotted in Figurej–?l. The average AF over five cycles for n_Co/Pd_ = 5 is 0.1867, for n_Co/Pd_ = 8 without current treatment is 0.3445, and for the hybrid case with current treatment (n_Co/Pd_ = 8) is 0.1577.
These results clearly demonstrate that the hybrid mode (a combination of stack design and current treatment) significantly improves synaptic device performance, as evidenced by the lower NL and AF values. The hybrid mode outperforms both the current-treated device and the material-selected device, confirming its superior synaptic plasticity with more stable, linear, and symmetric potentiation and depression. The superior performance of the hybrid mode may originate from its optimized microstructure and the resulting SOT dynamics. As revealed by HRTEM images (Figure), current treatment of the high-n_Co/Pd_ stack further increases twin density (from 0.52 to 0.72 nm^–1^ for n_Co/Pd_ = 8), introducing additional planar defects and interface shear within the CoPd region. These extended twin boundaries serve as uniform pinning sites, suppressing long-range domain-wall propagation and promoting nucleation-dominated reversal. Such localized, distributed switching leads to a dense hierarchy of intermediate magnetic states with reduced stochasticity, which manifests as smoother, more symmetric potentiation and depression curves (lower NL and AF in Figure).
In contrast, purely current-treated (low-n_Co/Pd_) devices generate spatially nonuniform twin distributions, causing irregular pinning and higher variation in state spacing, while as-deposited high-n_Co/Pd_ devices exhibit limited tunability of their preexisting defect structure. The hybrid configuration therefore achieves an ideal balance between structural design and controlled defect modulation, providing sufficient pinning to stabilize analog states yet maintaining enough mobility for reproducible, incremental weight updates. This synergy between microstructural engineering and electrical conditioning directly links the observed SOT multilevel linearity and symmetry to atomic-scale defect control, explaining the superior synaptic precision.
Neuromorphic Computing Performance
3.8
To identify the most suitable device for optimal neuromorphic potential among the PtMn/(Co/Pd)n/Ta devices, we performed artificial neural network (ANN) simulations to classify MNIST digits/letters using a Multilayer Perceptron (MLP) architecture. ?−? ? ? This evaluation enabled us to assess the impact of various device configurations (current-treated, material-selected, and hybrid modes) on the overall performance of neuromorphic tasks, providing insights into which device offers the optimal balance of synaptic plasticity, stability, and classification accuracy. To evaluate the neuromorphic performance of the PtMn/(Co/Pd)n devices, we incorporated their synaptic behaviors into a multilayer perceptron (MLP) neural network for the MNIST digit classification task. As illustrated in (Figurea), the MLP consists of three layers: 784 input neurons corresponding to the 28 × 28-pixel MNIST images, a hidden layer with 100 neurons, and an output layer with 10 neurons representing the digit classes (0–9). ?−? ? ? Synaptic weights in the network are derived from experimentally measured V_AHE_ values of the PtMn/(Co/Pd)n/Ta devices.
Demonstration of neuromorphic device performance. (a) Schematic of the Multilayer Perceptron (MLP) used in the artificial neural network simulation for MNIST digit recognition, (b) The recognition accuracy for current-treated dual mode samples (nCo/Pd = 2–7), with all samples achieving accuracy in the range of 95–96%, (c) The recognition accuracy for nCo/Pd = 8 devices (without current-treated and after current treated (Hybrid)), with hybrid samples achieving higher accuracy of over 97%, and (d) The recognition accuracy for nCo/Pd = 9 devices (without current-treated and after current treated (hybrid)), with hybrid samples achieving higher accuracy of over 97%.
The weights in the software were first normalized to a range of [−1, 1], and then a linear transfer function was applied to map these values to the physical states of the device, ensuring a one-to-one correspondence between the computational weights and accessible experimental states. This normalization process improves the convergence and stability of the training process.
To emulate real-world hardware imperfections, we injected additive noise into the V_AHE_ values and simulated stuck-at-minimum faults, representing nonideal behavior commonly seen in physical devices. These perturbed V_AHE_ values were then mapped back to the weights used in the neural network, allowing the MLP to operate with realistic device variability while maintaining functional accuracy. Figureb shows the recognition accuracy for current-treated dual-mode samples (n_Co/Pd_ = 2–7), with all samples achieving an accuracy range of 95–96%, consistent with the results previously obtained for n_Co/Pd_ = 4.? This demonstrates the flexibility of selecting the best dual SOT device that offers optimal performance and thermal stability.
Figurec and ?d present the recognition accuracy for the samples of n_Co/Pd_ = 8 (with and without current treatment) and n_Co/Pd_ = 9 (with and without current treatment), respectively. For the n_Co/Pd_ = 8 and n_Co/Pd_ = 9 devices without current treatment, the recognition accuracy remained similar to that of the current-treated dual devices, around 96%. However, for the hybrid devices (n Co/Pd = 8 and n Co/Pd = 9 after current treatment), the recognition accuracy increased slightly from ∼96% to over 97%, indicating a modest improvement enabled by the hybrid approach. This improved accuracy can be attributed to enhanced intermediate states and better linearity and symmetry responses of LTP/LTD synaptic weight updates. This underscores the superior potential of combining material selection with current conditioning to optimize synaptic plasticity and overall device performance for neuromorphic computing applications.
Conclusion
4
We demonstrate that the Co/Pd repeat number in PtMn/(Co/Pd)n multilayers provides a direct and deterministic route to select the SOT switching mode and synaptic functionality. Increasing n_Co/Pd_ modifies the multilayer microstructure in a systematic manner, including greater interface modulation and the formation of correlated planar defects, such as twins. These collective structural changes alter the switching dynamics between nucleation and domain-wall propagation during magnetization reversal. For the as-deposited sample with n_Co/Pd_ ≤ 7, domain-wall propagation remains efficient, resulting in binary switching that can transition to analog behavior only after additional defect formation through electrical conditioning. In contrast, for n_Co/Pd_ ≥ 8, the increased structural modulation in the as-deposited state suppresses long-range propagation and stabilizes nucleation-dominated analog switching without any post-treatment. Furthermore, combining a high repeat number with controlled current conditioning produces a refined structural landscape characterized by a more uniform and spatially distributed pinning environment. This hybrid state enables smooth, incremental magnetization updates, expands the number of accessible intermediate magnetic states, and improves both the linearity and symmetry of long-term potentiation and depression. As a result, hybrid devices with n_Co/Pd_ ≥ 8 achieve recognition accuracy in the MNIST classification task exceeding 97%. These findings demonstrate that the switching pathway of SOT devices can be tuned to enhance synaptic responses by tailoring the multilayer stacking architecture and applying electrical current conditioning. This work provides a scalable strategy for constructing thermally stable, energy-efficient analog spintronic synapses suitable for high-performance neuromorphic hardware.
Supplementary Material
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