# Virtualization as a New Scaling Law for Semiconductor Devices Beyond Geometric Scaling

## TL;DR

This paper proposes virtualization as a new way to scale semiconductor devices using AI, reducing reliance on physical testing and fabrication.

## Contribution

The paper introduces virtualization as a novel scaling law for semiconductors enabled by AI and virtual evidence.

## Key findings

- AI enables virtualization in design, fabrication, and qualification of semiconductor devices.
- Virtual evidence can replace physical iteration, improving efficiency and reducing costs.
- Future progress depends on the quality and integration of virtual evidence rather than just geometric scaling.

## Abstract

As Moore's‐law–driven geometric scaling nears physical, economic, and sustainability limits, semiconductor progress is increasingly constrained by the cost and latency of physical iteration. This Perspective argues that AI enables virtualization as a complementary scaling law: progress scales with how much trustworthy virtual evidence can replace exhaustive fabrication, testing, and qualification across the device lifecycle. We show how virtualization emerges in i) design and modeling via surrogate and physics‐informed learning, inverse design, and uncertainty‐aware exploration; ii) fabrication and packaging via digital twins, virtual metrology, and reinforcement learning; and iii) qualification via defect inference and reliability modeling that provide earlier risk signals. We outline boundary conditions—trust and uncertainty, cross‐stage coherence, sustainability, and governance—and argue that future innovation will depend not only on geometric shrinkage, but also on the fidelity, integration, and stewardship of virtual evidence.

AI‐enabled semiconductor scaling law. Virtualization emerges as an AI‐enabled scaling law for semiconductors, where progress depends on replacing physical iteration with credible virtual evidence. Surrogate modeling accelerates design‐space exploration, digital twins virtualize process learning, and defect‐to‐reliability inference advances qualification. The limiting factors move from feature length to evidence quality: validation, uncertainty, lifecycle coherence, and governance set the achievable scaling rate.