# Neuromorphic photonic computing with an electro-optic analog memory

## TL;DR

This paper introduces a neuromorphic photonic system with integrated analog memory that reduces energy use by 26 times while maintaining high accuracy for machine learning tasks.

## Contribution

The novel integration of analog memory with photonic computing units enables significant power savings and reduces data movement in neuromorphic systems.

## Key findings

- Integrating analog memory into neuromorphic photonic systems achieves over 26× power savings compared to conventional SRAM-DAC architectures.
- Maintaining a 100 retention-to-latency ratio in analog memory preserves >90% inference accuracy.
- The system reduces reliance on DACs and minimizes data movement for energy-efficient computing.

## Abstract

In neuromorphic photonic systems, device operations are typically governed by analog signals, necessitating digital-to-analog converters (DAC) and analog-to-digital converters (ADC). However, data movement between memory and these converters in conventional von Neumann architectures incur significant energy costs. We propose an analog electronic memory co-located with photonic computing units to eliminate repeated long-distance data movement. Here, we demonstrate a monolithically integrated neuromorphic photonic circuit with on-chip capacitive analog memory and evaluate its performance in machine learning for in situ training and inference using the MNIST dataset. Our analysis shows that integrating analog memory into a neuromorphic photonic architecture can achieve over 26 × power savings compared to conventional SRAM-DAC architectures. Furthermore, maintaining a minimum analog memory retention-to-network-latency ratio of 100 maintains  >90% inference accuracy, enabling leaky analog memories without substantial performance degradation. This approach reduces reliance on DACs, minimizes data movement, and offers a scalable pathway toward energy-efficient, high-speed neuromorphic photonic computing.

Neuromorphic photonic systems can incur significant energy for moving and converting data between digital and analog domains. This work shows that integrating analog memory into these processors can save 26 × power over conventional digital-to-analog architectures while keeping  > 90% inference accuracy.