Revealing and engineering contact-origin noise in ultrathin tellurium transistors
Hae-Won Lee, Minjae Kim, Junho Ban, Jae Hyeon Jun, Kiyung Kim, Useok Choi, Jung Tae Lee, Byoung Hun Lee

TL;DR
This study identifies the source of noise in ultrathin tellurium transistors and shows how to reduce it by adjusting the thickness of tellurium near the contacts.
Contribution
The paper introduces a contact-centric engineering strategy to suppress noise in ultrathin tellurium transistors.
Findings
Contact-origin trap-assisted tunneling dominates noise in 5 nm Te devices at room temperature.
Locally thickening the Te layer under contacts reduces noise by an order of magnitude in the nA current regime.
Noise suppression is achieved without compromising the 5 nm active channel thickness.
Abstract
Tellurium (Te) has emerged as a promising p-type semiconductor for ultrathin electronics owing to its strong air stability, excellent hole transport, narrow bandgap, and BEOL-integration compatibility. However, when the Te thickness approaches the depletion width, traps at the contact interface strongly affect carrier injection and introduce excess low-frequency noise. Here, we systematically investigate the origin of noise in ultrathin Te field-effect transistors (FETs) through bias- and temperature-dependent 1/f noise analysis. In devices with a 5 nm Te channel, contact-origin trap-assisted tunneling dominates in the low-current regime, producing deviations from the carrier-number-fluctuation (CNF) model at 300 K. Cooling to 100 K suppresses trap activation and restores typical CNF behavior, whereas 13 nm devices maintain CNF consistency at both temperatures due to screening of the…
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Taxonomy
TopicsAdvancements in Semiconductor Devices and Circuit Design · Semiconductor Quantum Structures and Devices · Advanced Semiconductor Detectors and Materials
