# LightIN: a versatile silicon-integrated photonic field programmable gate array with an intelligent configuration framework for next-generation AI clusters

## TL;DR

This paper introduces a reconfigurable silicon photonic chip that supports various AI cluster functions, such as computing and encryption, with high speed and energy efficiency.

## Contribution

The first silicon photonic chip with 40 programmable unit cells and an intelligent configuration framework for multifunctional AI clusters.

## Key findings

- Achieved 1.92 TOPS computing speed with 6.22-bit precision and 1.875 pJ MAC−1 energy efficiency.
- Demonstrated 4 × 4 photonic channel switching with –44 dB inter-channel crosstalk.
- Implemented silicon photonic physical unclonable functions for secure encryption.

## Abstract

Artificial Intelligence models pose serious challenges to intensive computing and high-bandwidth communication for conventional electronic circuit-based computing clusters. Silicon photonic technologies, due to their high speed, low latency, large bandwidth, and complementary metal-oxide-semiconductor compatibility, have been widely implemented for data transmission and actively explored as photonic neural networks in AI clusters. However, current silicon photonic integrated chips lack adaptability for multifunctional use and hardware-software systematic coordination, which is adverse to the development of photo-electronic AI clusters. Here, we develop a reconfigurable silicon photonic chip with 40 programmable unit cells integrating over 160 components, which, to the best of our knowledge, is the first to realize diverse functions for AI clusters with a chip, from computing acceleration and signal processing to network switching and secure encryption. Using a self-developed testing, compilation, and adjustment framework to the chip without in-chip monitoring photodetectors, we have demonstrated (1) 4 × 4 bi-direction unitary and 3 × 3 uni-direction non-unitary matrix multiplications, achieving a speed of over 1.92 TOPS with 6.22-bit precision and energy efficiency of 1.875 pJ MAC−1, and neural networks for image recognition with a latency of 260 ps; (2) micro-ring modulator wavelength locking in the 5 to 32 Gb s−1 transmission systems; (3) 4 × 4 photonic channel switching with low to –44 dB inter-channel crosstalk; (4) silicon photonic physical unclonable functions. This optoelectronic processing system, incorporating the photonic chip and its software stack, paves the way for both advanced photonic system-on-chip design and the construction of photo-electronic AI clusters.

We demonstrate a programmable silicon photonic chip with an intelligent configuration framework, enabling on-chip computing, signal processing, switching, and encryption.