# Structure Defects in CVD-Grown Silicon Carbide Epitaxial Wafers: From Fundamental Principles to Advanced Reduction Strategies

## TL;DR

This paper reviews the causes of defects in silicon carbide wafers made via CVD and suggests strategies to reduce them for better performance in power devices.

## Contribution

The paper systematically explains defect formation mechanisms and proposes practical strategies for reducing defects in CVD-grown SiC epitaxial wafers.

## Key findings

- Defects like TDs, BPDs, and SFs are critical for SiC wafer performance and reliability.
- Substrate engineering and growth parameter optimization are effective in reducing defects.
- Advanced post-treatment techniques and inspection methods are essential for low-defect-density materials.

## Abstract

The chemical vapor deposition (CVD) method is a key technology for producing silicon carbide (SiC) epitaxial wafers used in high-performance power devices. Defects in the epitaxial wafers, such as triangular, threading dislocations (TDs); basal plane dislocations (BPDs); and stacking faults (SFs), are considered the critical bottleneck determining device performance and long-term reliability. This review aims to systematically elucidate the fundamental physical and chemical principles underlying defect generation during epitaxial growth of SiC by CVD and provide a comprehensive assessment of corresponding defect reduction strategies. Starting from the essential condition of thermodynamic growth, we analyze the main mechanisms of defect formation, including nonequilibrium kinetics, surface reaction kinetics, and the inheritance of substrate defects. Emphasis is placed on discussing the mechanisms and methods for suppressing defect formation through substrate engineering (off-angle design and surface pretreatment), precise control of the growth parameters (C/Si ratio, temperature, gas composition, and so on), as well as advanced post-treatment techniques. This leads to the proposal of practical strategies focusing on substrate engineering and growth parameter optimization toward practical application. Finally, we summarize the inspection techniques and outline future research directions toward intrinsic low-defect-density SiC epitaxial materials for high-voltage applications.