# Repurposing Si CMOS nonidealities for stochastic and analog image processing

**Authors:** Been Kwak, Ryun-Han Koo, Changhyeon Han, Yunho Shin, Joonhyeok Choi, Dongbin Kim, Jongwoo Lee, Jiseong Im, Youngchan Cho, Jong-Ho Lee, Wonjun Shin, Daewoong Kwon

PMC · DOI: 10.1126/sciadv.aea2328 · Science Advances · 2026-02-20

## TL;DR

This paper shows how to use natural imperfections in standard CMOS transistors to perform advanced analog computing tasks like encryption and signal processing.

## Contribution

The novel contribution is repurposing device nonidealities in CMOS transistors for multifunctional analog computation at the single-device level.

## Key findings

- CMOS transistors can perform stochastic encryption and analog inversion using generation-recombination noise and negative differential resistance.
- A peak-to-valley ratio of 2.78 × 10⁴ was achieved in body current through impact ionization.
- This approach eliminates the need for external components like random-number generators or amplifiers.

## Abstract

Conventional semiconductor device engineering regards intrinsic device nonidealities as reliability concerns to be minimized or eliminated. Here, we demonstrate the strategic repurposing of these nonidealities as functional resources for advanced stochastic analog computing. We leverage two underutilized phenomena—deep-level channel trap-induced generation-recombination (G-R) noise and impact ionization–induced negative differential resistance (NDR) in body current—which have received limited attention compared to the extensively studied 1/f noise and monotonic drain current behavior in logic-centric transistors. By exploiting G-R noise with controllable temporal correlation and NDR with an unprecedented peak-to-valley ratio (2.78 × 104) within fully depleted silicon-on-insulator transistors fabricated in industry silicon complementary metal-oxide semiconductor (CMOS) process, we achieve multifunctional analog computation at the single-device level. Our transistor seamlessly performs stochastic encryption, deterministic signal readout, and analog inversion simply through reconfiguration of applied bias conditions, thereby eliminating the need for peripheral random-number generators, dedicated analog inverters, or amplifiers. This approach not only reveals the previously unrecognized computational potential embedded in mature CMOS technologies but also presents a scalable and energy-efficient alternative to architecture based on exotic materials, laying the foundation for next-generation analog computing systems.

A standard CMOS transistor harnesses intrinsic noise and nonlinearity to perform stochastic and analog image processing.

## Full-text entities

- **Genes:** NPHS1 (NPHS1 adhesion molecule, nephrin) [NCBI Gene 4868] {aka CNF, NPHN, nephrin}
- **Diseases:** FD (MESH:D000795), LFN (MESH:C565121), TCAD (MESH:C000719218)
- **Chemicals:** N2 (MESH:D009584), phosphorus (MESH:D010758), Metal (MESH:D008670), boron (MESH:D001895), SiO2 (MESH:D012822), SI (MESH:D012825), IGZO (-), oxide (MESH:D010087), arsenic (MESH:D001151), Mxenes (MESH:C000723374), Tungsten (MESH:D014414), VDS (MESH:D014751)
- **Mutations:** E to H, C) at 800, M to P, I to L, F to I, A to D, E5250A, (A) to (D), C to F, K to N

## Full text

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## Figures

5 figures with captions in the complete paper: https://tomesphere.com/paper/PMC12922738/full.md

## References

104 references — full list in the complete paper: https://tomesphere.com/paper/PMC12922738/full.md

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Source: https://tomesphere.com/paper/PMC12922738