# Application and Comparison of FPGA-Based Carry Chain TDC and DDMTD Schemes in High-Precision Time Synchronization

## TL;DR

This paper compares two FPGA-based methods for high-precision time synchronization, finding one to be more accurate and stable across temperatures.

## Contribution

The paper introduces and evaluates two novel FPGA-based phase difference measurement schemes with improved accuracy and temperature stability.

## Key findings

- The eight-parallel-multi-carry chain TDC outperforms DDMTD in measurement accuracy and temperature stability.
- The eight-parallel-multi-carry chain TDC achieves a measurement error within 4.6 ps at room temperature.
- The eight-parallel-multi-carry chain TDC has a significantly lower temperature coefficient compared to the single-carry chain TDC.

## Abstract

High-precision phase difference measurement based on field-programmable gate arrays (FPGA) has important application requirements in fields such as high-stability time-frequency transmission, signal synchronization, and precision testing. Addressing the limitations of traditional methods in terms of temperature stability and measurement accuracy, this paper proposes two high-precision phase difference measurement schemes based on the FPGA platform. An eight-parallel-multi-carry chain time-to-digital converter (TDC) and digital dual-mixer time difference (DDMTD) measurement modules are constructed to perform high-precision phase difference measurements on the phase-shifted output signal of the MMCM dynamic phase-shifted module. Results show that at room temperature (25 °C), the single-carry chain TDC exhibits better measurement accuracy than the DDMTD, and the single-carry chain TDC’s measurement error range of 4.7–6.0 ps is superior to the DDMTD’s 20–75 ps error range. Under different temperature conditions, the eight-parallel-multi-carry chain TDC consistently demonstrates superior measurement accuracy, resolution, and temperature stability compared to the single-carry chain TDC. In terms of measurement accuracy, under room temperature conditions, in three sets of phase difference tests (178.5714 ps, 357.1428 ps, and 535.7142 ps), the measurement error of the eight-parallel-multi-carry chain TDC was controlled within 4.6 ps, which is better than the 4.7–6.0 ps error range of the single-carry chain TDC. Average resolution: The average resolution of the single-carry chain TDC was 6.329 ps, while the average resolution of the eight-parallel-multi-carry chain TDC improved to 0.833 ps. Temperature stability: Within the temperature range of 10 °C to 100 °C, the temperature coefficient of the single-carry chain TDC was 0.002127 ps/°C, while the temperature coefficient of the eight-parallel-multi-carry chain TDC decreased to 0.000564 ps/°C. This paper also summarizes the advantages and limitations of the above methods in terms of implementation complexity and robustness, providing a reference for the optimized design of high-precision phase difference measurement technology for FPGA platforms.