# Fault interruption scheme for HVDC systems using GaN-HEMT and VCB

## TL;DR

This paper presents a new fault interruption scheme for high-voltage DC systems using GaN-HEMT and VCB for faster and more reliable fault clearing.

## Contribution

A novel hybrid DC circuit breaker design using GaN-HEMT for improved fault interruption in HVDC systems is introduced.

## Key findings

- The proposed HDCCB achieves fault-clearing times of 2.2 ms and 2 ms for different test parameters.
- GaN-HEMT outperforms SiC-MESFET in terms of reliability and switching speed for fault interruption.
- The design shows improvements of 52.38% and 50% in fault-clearing times compared to existing mechanisms.

## Abstract

Power electronics switching devices played an important role in high-voltage DC circuit breaker development. Timely isolation of faulty portions of an HVDC transmission line from a healthy system is a basic requirement for a fault interruption. In this scenario, the integration of hybrid DC circuit breakers (HDCCBs) with wideband-gap semiconductor devices enables the effective management of high power, currents, and voltages. The SiC-MESFET and the GaN-HEMT are commonly used wideband-gap-based semiconductor devices. This paper introduces a fault interruption scheme for HVDC power systems, featuring the advancement of a hybrid DC circuit breaker. The proposed HDCCB design consists of two parts, one part is based on a VCB as a mechanical circuit breaker, and the second part involves electronic switches for fault interruption. The electronic switches are designed through the combination of GaN and HEMT to achieve fast switching to achieve rapid interruption of fault current. The system model is implemented through a Simulink model to perform a comparative analysis between the presented and existing protection topologies. Current commutation is achieved through the attainment of artificial zero current crossing to interrupt the DC fault. GaN-HEMT emerges as a more reliable and fast switching element compared to other electronic switches like Sic-MESFET as validated by the presented simulative results. The presented model shows better fault-clearing times of 2.2 ms and 2 ms for experimental parameters of (500 kV and 9kA) and (100 kV and 10kA), respectively. This fault-clearing time shows an improvement of 52.38% and 50% compared to the SiC-MESFET-based electronic switches used by the existing mechanisms. The outcomes of the proposed design are evaluated in terms of fault current, commutated current, and voltage across the commutated capacitor.