1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks
Zhiting Tang, Chuanlin Li, Xuhao Zhang, Wuyang Ren, Kai Shen, Chuang Li, Qingsong Bai, Jin Li, Aobo Ren, Hao Wang, Xiaorong Luo, Hongxing Xu, Jiang Wu

TL;DR
A new VCSEL design with a passive cavity achieves a 1-MHz linewidth, enabling highly stable chip-scale atomic clocks.
Contribution
A monolithically integrated VCSEL with an embedded passive cavity achieves ultranarrow linewidth without external feedback.
Findings
The VCSEL achieves an intrinsic linewidth of ~1 MHz at the cesium D1 line (894.6 nm).
The device supports a frequency stability of 1.89 × 10–12 τ-1/2 in a cesium vapor-cell atomic clock.
The VCSEL exhibits SMSR > 35 dB and OPSR > 25 dB with robust single-mode operation.
Abstract
Narrow-linewidth vertical-cavity surface-emitting lasers (VCSELs) are key enablers for chip-scale atomic clocks and quantum sensors, yet conventional designs suffer from short cavity lengths and excess spontaneous emission, resulting in broad linewidths and degraded frequency stability. Here, we demonstrate a monolithically integrated VCSEL operating at the cesium D1 line (894.6 nm) that achieves intrinsic linewidth compression to ~1 MHz, without requiring external optical feedback. This performance is enabled by embedding a passive cavity adjacent to the active region, which spatially redistributes the optical field into a low-loss region, extending photon lifetime while suppressing higher-order transverse and longitudinal modes. The resulting device exhibits robust single-mode operation over a wide current and temperature range, with side-mode suppression ratio (SMSR) > 35 dB,…
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Taxonomy
TopicsAtomic and Subatomic Physics Research · Advanced Frequency and Time Standards · Quantum optics and atomic interactions
