Generalized Proportional–Integral–Derivative Interpretation of a Class of Improved Two-Degree-of-Freedom Controllers

TL;DR

This paper compares traditional and improved ADRC controllers, showing the improved version offers better performance and fewer parameters.

Contribution

The paper establishes a mathematical link between traditional and improved ADRC from a generalized PID control perspective.

Findings

Improved ADRC eliminates overshoot during set value tracking and has faster response times.

Improved ADRC achieves better disturbance rejection with significantly smaller voltage drops.

The improved ADRC uses fewer parameters than generalized PID control.

Abstract

In the framework of the traditional active disturbance rejection controller (ADRC), the state error feedback utilizes estimated values from the extended state observer, which may introduce phase lag. Therefore, academic researchers have proposed a modified version called the improved linear ADRC that employs output values from the plant for state error feedback except the output value from the extended state observer. However, there is limited literature exploring the relationship between traditional linear ADRC and improved linear ADRC. To address this gap, this article establishes mathmatical relationship between traditional linear ADRC and improved linear ADRC from the generalized PID control perspective, highlighting their distinctions in the frequency domain. Compared to the traditional ADRC, the improved ADRC incorporates differential terms and offers a novel approach to realize the generalized PID control via generalized PID interpretation. And to be more specific, the improved ADRC is a new way to realize the generalized PID control by three tuned parameters, and the number of parameters of the improved ADRC is fewer than that of the generalized PID control. From the time domain, numerical simulation results demonstrate that improved ADRC exhibits superior control performance by eliminating overshoot during set value tracking processes compared to the traditional ADRC. From the disturbance rejection simulations in direct current to direct current converter (DCDC), the improved ADRC can achieve better disturbance rejection performance than the traditional ADRC. The DC bus voltage drop values of the traditional ADRC are 55.8 V and 32 V; thus, the biggest voltage drop is 55.8 V, which is 7.44 times the the improved ADRC. The voltage rise of improved ADRC can be neglected compared to the voltage rise of the traditional ADRC. From the tracking performance perspective, the time to fully reach the reference value of the traditional ADRC is about 0.3 s, and the time to fully reach the reference value of the improved ADRC is about 0.15 s.

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Full text

1. Introduction

The active disturbance rejection controller (ADRC), proposed by Prof. Han [1], has gained significant attention due to its exceptional disturbance rejection capability. To be more specific, the ADRC has tracking performance and disturbance rejection performance. For traditional proportional–integral controller, tracking performance and disturbance rejection performance are coupled. Once tracking performance is determined, disturbance rejection performance is also determined. For ADRC, tracking performance is dependent on the state error feedback control, and disturbance performance can de adjusted by the extended state observer. So, tracking performance and diturbance rejection performance are decoupled, which results in a two-degree-of-freedom controller. Thus, the revised version of the ADRC can be named improved two-degree-of-freedom controller.

ADRC has found applications in various industrial scenarios [2,3,4,5,6,7,8,9], including permanent magnet synchronous machines [10], induction motors [11], and grid-connected converters [12]. Given the stringent control requirements of these industrial scenarios, the robustness of ADRC plays a crucial role. Consequently, this research investigates approaches such as the linear-nonlinear switching ADRC [13] and the ADRC with integrator-extended state observer [14] to enhance the robustness of ADRC.

We present a control scheme that integrates linear and nonlinear switching mechanisms into an active disturbance rejection control (ADRC) framework, and the stability of the proposed scheme is analyzed using quantitative methods and compared to both linear and nonlinear ADRC approaches [13]. Additionally, the stability analysis of multiple input multiple output (MIMO) continuous systems based on linear/nonlinear switching ADRC is conducted in [15], building upon the work presented in [13]. The effectiveness of the proposed linear–nonlinear switching ADRC from [13] has been successfully extended to the context of permanent magnet synchronous motors in [16], demonstrating significant robustness. Regarding the stability assessment of this proposed approach, Lyapunov functions have been constructed as shown in both [17,18].

In the context of ADRC, a generalized integrator-extended state observer is proposed to effectively suppress extensive-scale rapidly varying sinusoidal disturbances in grid-connected converters scenario [14]. Building upon [14], Lin further proposes a generalized integrator-nonlinear extended state observer for accurate tracking and compensation of fast-varying sinusoidal disturbances, which has been validated using the dSPACE platform [19]. Additionally, a novel quasi-generalized integrator is proposed to suppress both periodic and aperiodic disturbances in the current loop of permanent magnet synchronous motors (PMSM) [20]. Furthermore, an innovative reduced-order vector resonant controller combined with generalized active disturbance rejection control is presented to effectively mitigate current disturbances containing periodic harmonics in PMSMs [21].

In the context of ADRC, the inclusion of state error feedback using output values from the plant can significantly enhance the robustness of revised ADRC compared to traditional ADRC by eliminating feedback phase lag. To ensure a fair comparison between traditional ADRC and improved ADRC, establishing a uniform scale is crucial, and this can be achieved through mathematical tools. However, researchers have not yet investigated the mathematical interrelation between traditional ADRC and improved ADRC with state error feedback using output values from the plant. Cao et al., in their literature review, provide an integrated explanation of active disturbance rejection control for electrical drives [22]. They employ a generalized proportional–integral–derivative (PID) controller to demonstrate the relationship between traditional linear ADRC and PI controller with reduced-order proportional–integral observer [23]. Furthermore, they analyze the mathematical relationship between high-order linear ADRC and cascade linear ADRC using generalized PID controller [24]. Inspired by these methods [22], we apply the generalized PID controller to analyze both the improved first-order linear ADRC and the improved second-order linear ADRC. And in [22,23,24], the traditional ADRC is analyzed by using the generalized PID control; thus, the relationship between the traditional ADRC and the improved ADRC is not determined.

The contribution of this article lies in the application of the generalized PID controller for analyzing the improved first-order linear ADRC and the improved second-order linear ADRC, thereby illustrating their distinctions through transfer function analysis. Specifically, compared to traditional linear ADRC, the improved ADRC incorporates differential terms in the perspective of the PID controller. To be more specific, this article establishes a mathmatical relationship between traditional linear ADRC and improved linear ADRC from the generalized PID control perspective, highlighting their distinctions in the frequency domain. Compared to the traditional ADRC, the improved ADRC incorporates differential terms and offers a novel approach to realize the generalized PID control via generalized PID interpretation. And to be more specific, the improved ADRC is a new way to realize the generalized PID control by three tuned parameters; the number of parameters of the improved ADRC is fewer than that of the generalized PID control. From the time domain, numerical simulation results demonstrate that improved ADRC exhibits superior control performance by eliminating overshoot during set value tracking processes compared to the traditional ADRC. From the disturbance rejection simulations in direct current to direct current converter (DCDC), the improved ADRC can obtain better disturbance rejection performance than the traditional ADRC.

The remainder of this paper is structured as follows. Section 2 presents the problem formulation. Section 3 presents the generalized PID interpretation of the improved first-order linear ADRC and the improved second-order linear ADRC. Section 4 gives the numerical simulation results. Conclusions and future work appear in Section 5.

2. Problem Formulation

The traditional framework of the linear ADRC includes the state error feedback control, the extended state observer (ESO), and the total disturbance compensation (Z2). The traditional first-order linear ADRC is presented in Figure 1.

The traditional second-order linear ADRC is illustrated in Figure 2.

In order to mitigate the phase lag of the traditional linear ADRC in state error feedback control channel, the output values of the plant can be fed back to the state error feedback control channel. Thus, the improved first-order linear ADRC (IFLADRC) and the improved second-order linear ADRC (ISLADRC) are illustrated in Figure 3 and Figure 4, respectively.

The characteristics of the improved linear ADRC is that the state error feedback control uses the output value (y) from the plant instead of the values from the ESO (Z1), which mitigates the phase lag of the feedback values. We apply the generalized PID controller to analyze the IFLADRC and the ISLADRC, which illustrates the controller differences between the improved linear ADRC and the traditional linear ADRC by transfer function.

3. Main Results

The subsequent symbols are utilized consistently throughout this paper: $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ are gain coefficients of ESOs, $[eqn]$ , $[eqn]$ , and $[eqn]$ are coefficients of state error feedback control, and $[eqn]$ , $[eqn]$ are estimated values of $[eqn]$ , $[eqn]$ , respectively.

3.1. The IFLADRC

Lemma 1.  For some systems satisfying (1), (2), and (3), the IFLADRC can be interpreted as a PID controller in series with a filter.

Proof. It is assumed that the plant depicted in Figure 1 and Figure 3 can be characterized as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$

The linear ESO and state error feedback control in the framework of traditional linear first-order ADRC can be illustrated as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$

where $[eqn]$ and $[eqn]$ are observed values of $[eqn]$ and $[eqn]$ , respectively. Equations (4)–(6) are consistent with Figure 1.The linear ESO and the improved state error feedback control in the framework of the improved linear first-order ADRC can be illustrated as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$

Here, $[eqn]$ and $[eqn]$ represent the estimated values of $[eqn]$ and $[eqn]$ , respectively. Equations (7)–(9) are consistent with Figure 3.We rewrite the linear ESO and the improved state error feedback control as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$

We treat y and r as the input value and u as the output value. We can get the following transfer functions as follows:

$$[eqn]$$ $$[eqn]$$

By mathematical derivation, we can get

$$[eqn]$$ $$[eqn]$$

We can rewrite $[eqn]$ as follows:

$$[eqn]$$

By observing (17), we can get

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$

where $[eqn]$ represents the proportional gain, $[eqn]$ denotes the integral gain, and $[eqn]$ signifies the derivative gain. The proof of Lemma 1 is finished. □

By observing (4)–(6), we can get

$$[eqn]$$

where

$$[eqn]$$ $$[eqn]$$

Thus, the traditional first-order linear ADRC can be interpreted as a PI controller in series with a low-pass filter, which is also proved in [25].

$$[eqn]$$

3.2. The Improved Second-Order Linear ADRC

Lemma 2.  For some systems satisfying (20)–(23), the ISLADRC can be interpreted as a PIDD^2^ controller in series with a filter.

Proof. We assume that the Plant in Figure 2 and Figure 4 can be described as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

The linear ESO and state error feedback control in the framework of the traditional linear second-order ADRC can be illustrated as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

where $[eqn]$ , $[eqn]$ , and $[eqn]$ are observed values of $[eqn]$ , $[eqn]$ , and $[eqn]$ , respectively. Equations (24)–(27) are consistent with Figure 2.The linear ESO and the improved state error feedback control in the framework of the ISLADRC can be illustrated as follows:

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

Equations (28)–(31) are consistent with Figure 4.Substituting (31) into (29), we can get

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

We treat y and r as the input value and u as the output value. We can get the following transfer functions as follows:

$$[eqn]$$ $$[eqn]$$

By mathematical derivation, we can get

$$[eqn]$$ $$[eqn]$$

where $[eqn]$ , $[eqn]$ .Then, we rewrite $[eqn]$

$$[eqn]$$

where

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

By observing (40), we can determine that the improved second-order linear ADRC can be interpreted as a PIDD^2^ controller in series with a low-pass filter. The proof of Lemma 2 is finished. □

By observing (24)–(27), we can get

$$[eqn]$$

where

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

where

$$[eqn]$$

Thus, the traditional second-order linear ADRC can be interpreted as a PID controller in series with a low-pass filter, which is also proved in [25].

$$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$ $$[eqn]$$

3.3. The Discussions of the Improved First-Order and Second-Order Linear ADRC

By observing $[eqn]$ , the state error feedback control channel uses the output value y in the improved first-order linear active disturbance rejection controller (IFLADRC), different from the state error feedback control channel utilizing the estimated value z in the traditional first-order linear active disturbance rejection controller from the extended state observer. For the improved second-order linear active disturbance rejection controller (IFLADRC), $[eqn]$ , adopting the state error feedback control channel, uses the output value y, different from the state error feedback control channel using the estimated value z from the extended state observer in the framework of traditional second-order linear active disturbance rejection controller.

$[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ and $[eqn]$ can be illustrated in Figure 5. In Figure 5, $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ and $[eqn]$ .

4. Simulation and Discussions

To evaluate and compare the control performance of the improved ADRC and the traditional ADRC, this section presents a numerical simulation example. The liquid level control system is a typical system, and the plant is characterized by the following transfer Function (51), and the parameters of (51) can be identified by the manufacturer of liquid level systems.

$$[eqn]$$

According to (51), the improved ADRC and the traditional ADRC are designed by referring to the Main results section.

The improved ADRC is derived from the traditional first-order ADRC. In the state feedback control law of the improved ADRC, the plant’s output value is utilized instead of relying on the output value from the extended state observer. Through simulation results analysis, it can be observed that the improved ADRC exhibits enhanced tracking performance compared to the traditional ADRC. Furthermore, Figure 6 demonstrates that the overshoots presented in traditional ADRC can be eliminated by employing the improved ADRC approach. Consequently, smooth tracking can be achieved using the improved version of ADRC. The biggest overshoot value of the traditional ADRC is about 4.5, which is about 4.5 times the set value. Tracking errors of the traditional ADRC and the improved ADRC all converge to zero. The setting time of the improved ADRC is longer than that of the traditional ADRC. The parameters of the improved ADRC and the traditional ADRC are as follows: $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ .

From the integral of squared error (ISE) scope, the value of ISE for the improved ADRC is smaller than that of the traditional ADRC. It means that the improved ADRC reduces the maximum instantaneous error of the system. The improved ADRC is sensitive to large errors, and it can effectively suppress large overshoots and oscillations. The above description can be verified by Figure 7.

From the integral of time multiplied by squared error (ITSE) scope, the value of ITSE for the traditional ADRC is bigger than that of the improved ADRC in Figure 8. The value of the traditional ADRC is about zero, but that of the improved ADRC is about 0.00025.

From the integral of absolute error (IAE) scope, the value of IAE for the traditional ADRC is bigger than that of the improved ADRC in Figure 9. The steady state value of the traditional ADRC is about 0.35, but the steady state value of the improved ADRC is about 0.02.

From the integral of time multiplied by absolute error (ITAE) scope, the value of ITAE for the traditional ADRC is bigger than that of the improved ADRC in Figure 10. The steady state value of the traditional ADRC is about 0.00122, but the steady state value of the improved ADRC is aobut 0.0001.

DC-DC power converters are prevalent in hybrid energy vehicles and other engineering application scenarios.

Figure 11 depicts a control system for a DC bus connected to a battery and a load. The core of the system is an active disturbance rejection controller, which receives the nominal voltage ( $[eqn]$ ) and the battery output voltage ( $[eqn]$ ) as inputs. The ADRC generates a reference current ( $[eqn]$ ), which is then compared to the actual battery current ( $[eqn]$ ). And the error between the $[eqn]$ and $[eqn]$ is the input of the proportional–integral (PI) controller in Figure 11. The ADRC includes the traditional ADRC and the traditional ADRC. The traditional ADRC can be described by Formulas (4)–(6). The improved ADRC is illustrated by (7)–(9). The PI controller adjusts the duty cycle ( $[eqn]$ ) to produce pulse width modulation (PWM) signals ( $[eqn]$ and $[eqn]$ ) that control the switching of the battery’s power electronic switches.

The DCDC section includes an inductor ( $[eqn]$ ), a capacitor ( $[eqn]$ ), and diodes ( $[eqn]$ ) to regulate current and voltage. The battery’s output voltage ( $[eqn]$ ) and the nominal voltage are fed back to the ADRC, forming a closed-loop control system. The load is connected to the DC bus, and the system aims to maintain stable voltage regulation by dynamically adjusting the PWM signals based on the ADRC and PI controller outputs. This configuration ensures efficient power delivery to the load while managing the battery’s charging and discharging processes.

Figure 12 presents the load profile over a 35-s period, depicting the variation in power demand (in watts) with respect to time. The load remains near zero for approximately 4 s, indicating the absence of external disturbances. Subsequently, the load rapidly increases to approximately 6 × 10^4^ W within one second, reflecting a significant rise in external disturbance. Consequently, the disturbance rejection performance differs between the traditional ADRC and the improved ADRC. The improved ADRC can reduce the magnitude of DC bus voltage fluctuations more effectively than the traditional ADRC. The curve of the load decreases sharply to validate the disturbance rejection performance from 4 s to 35 s. From 0 to 4 s, the tracking performance of the traditional ADRC and the improved ADRC is compared.

Figure 13 compares the DC bus voltage values (in volts) over time (in seconds) between the improved ADRC and the traditional ADRC. The graph demonstrates that the improved ADRC achieves superior performance in maintaining a stable DC bus voltage compared to the traditional ADRC. The traditional ADRC exhibits significant fluctuations and pronounced voltage spikes, particularly during the initial phase (0–10 s) and the middle phase (15–25 s). In contrast, the improved ADRC maintains a smoother and more consistent voltage profile with reduced deviations from the nominal value. This indicates that the improved ADRC effectively mitigates voltage oscillations and enhances system robustness under dynamic operating conditions. Overall, the trend underscores the enhanced effectiveness of the improved ADRC in achieving precise voltage regulation.

The “Zoom figure” in Figure 13 is presented in Figure 14. The overshoot value of both the traditional ADRC and the improved ADRC is about 2.8 V. The time required for the traditional ADRC to fully reach the reference value is approximately 0.3 s, whereas the improved ADRC achieves the reference value in approximately 0.15 s. Therefore, the improved ADRC demonstrates superior performance in terms of response speed compared to the traditional ADRC.

Figure 15 can be obtained from the data in Figure 13. To be more specific, Figure 15 illustrates the DC bus voltage error (in volts) over time (in seconds) between the reference value and the controlled DC value for the improved ADRC and the traditional ADRC. In Figure 15, the improved ADRC value represents the difference between the reference value and the feedback value. The traditional ADRC value in Figure 15 represents the reference value minus the feedback value. In order to describe Figure 15 more clear, we give the zoom figure from Figure 15. They are named Figure 16, Figure 17 and Figure 18.

In Figure 16, from 0 to 10 s, the DC bus voltage drops for the improved ADRC are 7.5 V and 5.5 V. Thus, the biggest voltage drop is 7.5 V. However, the DC bus voltage drop values of the traditional ADRC are 55.8 V and 32 V; therefore, the biggest voltage drop is 55.8 V, which is 7.44 times the improved ADRC. As for voltage rise, the voltage rise of the improved ADRC can be neglected compared to the voltage rise of the traditional ADRC. The voltage rise value is lesser than the voltage drop for the traditional ADRC and the improved ADRC.

In Figure 17, from 10 to 17 s, the DC bus voltage drop of the improved ADRC can be ignored. However, the biggest voltage drop value of the traditional ADRC is 19.6 V. The DC bus voltage rise values of the traditional ADRC are 74 V and 7.6 V. Thus, the biggest voltage rise value is 74 V, which is 7.4 times the improved ADRC. The voltage drop value is lesser than the voltage rise value for the traditional ADRC and the improved ADRC.

In Figure 18, from 16 to 34 s, the DC bus voltage drop of the improved ADRC is 5 V. However, the biggest voltage drop of the traditional ADRC is 31 V, which is six times the improved ADRC. The largest DC bus voltage rise of the traditional ADRC is 43 V. The biggest DC bus voltage rise of the improved ADRC is 5 V, which is one-eighth of the traditional ADRC.

By summarizing the above descriptions, the graph shows that the improved ADRC demonstrates significantly smaller fluctuations and better robustness compared to the traditional ADRC. While both methods show some error variations, the traditional ADRC exhibits larger spikes and oscillations, particularly in the early stages and around 15–25 s. In contrast, the improved ADRC maintains a more consistent error close to zero, indicating superior performance in stabilizing the DC bus voltage.

5. Conclusions

This article establishes a mathmatical relationship between traditional linear ADRC and improved linear ADRC from the generalized PID control perspective, highlighting their distinctions in the frequency domain. Compared to the traditional ADRC, the improved ADRC incorporates differential terms and offers a novel approach to realize the generalized PID control via generalized PID interpretation. And to be more specific, the improved ADRC is a new way to realize the generalized PID control by three tuned parameters; the number of parameters of the improved ADRC is fewer than that of the generalized PID control. From the time domain, numerical simulation results demonstrate that improved ADRC exhibits superior control performance by eliminating overshoot during set value tracking processes compared to the traditional ADRC. To be more specific, the time to fully reach the reference value of the traditional ADRC is about 0.3 s, and the the time to fully reach the reference value of the improved ADRC is about 0.15 s. Thus, the improved ADRC is better than the traditional ADRC form the perspective of the time to fully reach the reference value.

From the disturbance rejection simulations in direct current to direct current converter (DCDC), the improved ADRC can achieve better disturbance rejection performance than the traditional ADRC.

The graph shows that the improved ADRC demonstrates significantly smaller fluctuations and better robustness compared to the traditional ADRC. While both methods show some error variations, the traditional ADRC exhibits larger spikes and oscillations, particularly in the early stages and around 15–25 s. In contrast, the improved ADRC maintains a more consistent error close to zero, indicating superior performance in stabilizing the DC bus voltage.

For future work, we plan to explore optimal parameter tuning for the improved ADRC, traditional ADRC, PI, PID, and PIDD^2^ controllers.