Achieving high precision in analog in-memory computing systems
Piergiulio Mannocci, Giacomo Larelli, Marco Bonomi, Daniele Ielmini
TL;DR
This paper explores how to improve precision in analog in-memory computing systems by analyzing error sources and mitigation strategies.
Contribution
The paper introduces a comprehensive review and analysis of error mitigation techniques for analog in-memory computing.
Findings
Error sources in AIMC include noise and device variations.
Mitigation strategies like bit slicing and error correction codes are surveyed.
Tradeoffs between precision and hardware overhead are analyzed.
Abstract
Modern workloads challenge von Neumann architectures due to memory-processor data transfer. In-memory computing (IMC) enables in situ processing, with analog IMC (AIMC) based on resistive memories offering high-throughput and energy-efficient multiply-accumulate operations. Precision is limited by noise, device/circuit variations, and non-idealities. This work reviews error sources in AIMC and surveys mitigation strategies: bit slicing, residue number system, error correction codes, and mixed-precision iterative refinement, analyzing hardware implementations, overheads, and tradeoffs.
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Taxonomy
TopicsAdvanced Data Storage Technologies · Advanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices