Quantum‐Inspired Fourier Transforms Based on Circuits
Hanxu Zhang, Yifan Sun, Xiangdong Zhang
TL;DR
This paper introduces a classical circuit-based Fourier transform inspired by quantum computing, achieving faster processing speeds than traditional methods.
Contribution
A novel classical circuit scheme that emulates quantum Fourier transform with correlated electrical signals and faster computation.
Findings
The circuit-based Fourier transform matches the speed of quantum FT algorithms.
Classical circuits can emulate quantum gates and perform efficient signal processing.
Experimental verification was conducted for processors with 2, 3, and 5 qubits.
Abstract
Fourier transform (FT) is ubiquitous in modern society due to their broad applications in many branches of science and engineering. Improving the speed of FT is a common interest in the fields of signal processing. The quantum FT is generally believed to be superior to classical algorithms, but it requires a special quantum environment to perform, which has not yet been widely used. Inspired by quantum FT, here a new FT scheme is demonstrated based on circuits. In the circuit scheme, a new type of classical correlation, which its mathematical form corresponds to those of quantum entanglement, has been constructed. The calculation speed using the designed circuit scheme is equivalent to those based on the quantum FT algorithms, which is faster than those based on the classical fast FT algorithms. Furthermore, some basic gates have been designed and experimentally fabricated using…
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Figure 11- —National Key R & D Program of China
- —National Natural Science Foundation of China10.13039/501100001809
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Quantum Information and Cryptography · Quantum Mechanics and Applications
Introduction
1
Fourier transform (FT) becomes a standard tool in contemporary sciences since the ‘fast Fourier transform (FFT)’ algorithm was developed in 1965.^[^ 1 ^]^ It has been used in many fields such as physics, number calculation, signal processing, probability statistics, cryptography, acoustics, and optics.^[^ 2, 3 ^]^ The FFT plays an important role in these fields. On the other hand, with the progress of research in quantum information, the quantum FT algorithm has been proposed.^[^ 4, 5, 6, 7, 8, 9 ^]^ The quantum FT (QFT) is believed to outperform the classical FFT in signal processing, which has attracted much attention in recent decades.^[^ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 ^]^ However, the QFT is typically believed to be performed in a quantum computing environment, where information is encoded using quantum states. Because quantum states are quite fragile and easily affected by external disturbance, the bottleneck issues such as decoherence and scalability are particularly difficult to address.^[^ 9, 20 ^]^ Although there have been significant progresses in the research of quantum information process in recent years,^[^ 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 ^]^ applying QFT to solve practical problems still keeps great challenges.
Recent investigations have shown that a formal analogy between classical and quantum information processes can be constructed.^[^ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53 ^]^ Based on such a correspondence, the QFT has been emulated in some classical systems.^[^ 54, 55, 56 ^]^ For example, an electric circuit scheme for performing the QFT has been discussed in a recent work, by using the simulation of quantum walks.^[^ 56 ^]^ However, the proposed scheme is not scalable. Namely, it needs 2* ^n^
- number of circuit components to realize n qubits. This means that the scheme failed to provide a classical analogy of QFT circuit in sources. The question is whether it is possible to design classical circuits to implement better analogy of QFT circuit.
Inspired by the QFT circuit scheme, in this work we propose an analog scheme of classical circuit for the QFT. In our scheme, the classical circuit network, which includes the information processing elements that corresponds to the quantum gate sets, is designed. The information is encoded using correlated electrical signals, which establishes a mathematical correspondence between the novel classical correlation and quantum entanglement. This makes the classical circuit network have processing functions similar to that of quantum computation. As a results, the number of the basic computing components employed in our circuit, including only the copy, addition, subtraction and multiplication operations, is consistent with the number of the quantum gate in quantum circuit. Based on our theoretical consideration, we present an experimental verification on the analogy of the two, three and five qubit processors.
Theoretical Scheme of Quantum‐Inspired Fast Fourier Transforms Based on Circuits
2
The n‐qubit QFT is a basis transformation in an N = 2^ n ^‐state space that transforms the state |K〉 to |J〉 (K and J are integers ranging from 0 to N − 1) according to
where the N data points x 1,x 2,⋅⋅⋅, x _ N − 1_ and *x_N_
- are encoded into the N amplitudes of the N basis states, and the output amplitudes X 1,X 2,⋅⋅⋅, X _ N − 1_ and *X_N_
- are the results of the discrete FT of the N input amplitudes.
The quantum circuit model of the QFT utilizes the 1‐qubit Hadamard gate
and the 2‐qubit controlled phase gates
where m is a variable parameter. To simulate the QFT using an electric circuit, two essential actions must be performed. One is defining the analog of a qubit with the state of the electric circuits, and the other is certifying the electric operations on those states that can realize the function of the above quantum gates. To simulate the qubit, we define “cebit” in our circuit design. Each cebit contains 4 voltage signals, and we can get 2^ n ^ classical states to correspond to quantum states using the 4nvoltage signals of the n cebits. To simulate the quantum gates, we realize the corresponding circuit gates.
We first take the correspondence to the 1‐qubit gate U^H as an example. The U^H gate acts on the quantum state |ϕ⟩=ϕ0|0⟩+ϕ1|1⟩=[ϕ0ϕ1] as
where ϕ_0_ and ϕ_1_ represent the amplitude of the quantum state |ϕ〉, and they are transformed into ϕ′0 and ϕ′1. To implement the corresponding 1‐qubit operation in the classical circuit, we construct the circuit network *U_H_
- as shown in Figure 1a. The 4 input voltage signals denoted by V1⃗ =(V1,0,Re, V1,0,Im, V1,1,Re, V1,1,Im)^T^, where “T” represents the matrix transpose, are used as the analog of a qubit as a whole and known as a cebit. Each component of V1⃗ is a time‐dependent voltage function. To implement the function of the Hadamard gate correspondingly, the circuit network *U_H_ *is required to transform the input voltage signals into the output voltage signals (V′=(V′1,0,Re,V′1,0,Im,V′1,1,Re,V′1,1,Im)T, as shown by
a) The diagram of the 1‐cebit gate UH . In 1‐cebit system, the amplitude φ0 depends on voltage signals V1,0,Re and V1,0,Im, while the amplitude φ1 depends on voltage signals V1,1,Re and V1,1,Im. b) The circuit design of the 1‐cebit gate UH . It consists of 4 adder modules. These modules share a similar design, but their specific configurations differ. One typical module includes 1 operational amplifier (represented by triangle) and 4 resistors (represented by a rectangle). c) The diagram of the 2‐cebit gate UCRm. In 2‐cebit system, the amplitude φ00 depends on the voltage signals V1,0,Re,V1,0,Im,V2,0,Re and V2,0,Im, and so do the other amplitudes. d) The circuit design of the CR module. It consists of 4 multiplier modules (marked by “ × ”) and 2 adder modules (marked by “+ ”). Different multiplier modules share identical designs, containing 1 analog multiplier (represented by pentagon) and 2 resistor (represented by a rectangle), while adder modules differ in their circuit designs, containing 1 analog adder (represented by triangle) and varying numbers resistor (represented by a rectangle).
Subsequently we demonstrate that the transformation of the voltage signals can be described by the classical state |φ) corresponding to the quantum state |ϕ〉. To illustrate the relation between the classical states and the quantum states clearer, we employ the notation “|)” to denote the classical states given by cebit. In particular, the classical state of the voltage signals is expressed by
where
φ_0_ and φ_1_ represents the complex amplitudes of the classical state |φ) corresponding to the complex amplitudes of the quantum state |ϕ〉. As complex values, they are obtained from the complex voltage signal function V1,0,Re+iV1,0,Im and V1,1,Re+iV1,1,Im respectively. T = 2π/ω is the period of the voltage signals, where the frequency ω depends on the experimental setting. And the summation upper limit W for the index w is determined by the input voltage V1,0,Re,V1,0,Im,V1,1,Re and V1,1,Im. We denote the highest frequency component in the spectrum of V as Wω. Since ω is known, W can be derived accordingly. Under the definition above, the gate *U_H_
- transforms the input classical state |φ) into the output state |φ′) = φ′0|0) + φ′1|1), where
and
So we have
which corresponds to the result shown in Equation (5).
Next, we briefly describe the design of the circuit network *U_H_
- used to implement the transformation shown in Equation (6). As is shown in Figure 1b, *U_H_
- consists of 4 analog adder/subtractor modules, which are referred to as “adder/subtractor circuit”. Since subtraction is mathematically equivalent to adding a negative value, we simply call it “adder module”, and mark the module by the black boxes with plus sign “+ ”. Each module has 2 input and 1 output, performing weighted addition operations on the input voltage signals and outputs the result. These adder modules share a similar design, but their specific configurations are different. Here, we illustrate the structure of one certain modules. This depicted module contains 1 operational amplifier (represented by triangle) and 4 resistors (represented by rectangle). The design details of the module and its calculation results are provided in the subhead “The detailed circuit design of 1‐cebit gate (adder module)” of Experimental Section.
Now we consider the correspondence 2‐qubit gate U^CRm. The U^CRm acts on the quantum state |ϕ〉 = ϕ_00_|00〉 + ϕ_01_|01〉 + ϕ_10_|10〉 + ϕ_11_|11〉 as
where ϕ_00_,ϕ_01_,ϕ_10_ and ϕ_11_ represent the amplitude of the quantum state. To implement the corresponding 2‐qubit operation using the classical circuit, we construct the circuit network UCRm as shown in Figure 1c. The 8 voltage signals for two cebits are denoted as Vk⃗=(Vk,0,Re,Vk,0,Im,Vk,1,Re,Vk,1,Im)T(k = 1, 2). In addition, this classical gate contains 2 fixed inputs Vl,Re and Vl,Im, which multiply with these component voltage signals. The circuit network UCRm transforms these voltage signals into V′k⃗=(Vk,0,Re′,Vk,0,Im′,Vk,1,Re′, Vk,1,Im′)^T^, and we have
The classical state |φ) can be expressed by the voltage signals using the above definitions
where
Here φs1,s2 represents the amplitude of the classical state, and the subscript s 1 and s 2 take the value 0 or 1, the functions represent
and the symbol “*” is the convolution operation, for the periodic functions f 1 and f 2 with period T, we have
In general convolution operations, the integration limits range from − ∞ to + ∞, however, for periodic sine and cosine function, the integration limits are confined to the interval [0, T]. Both Equations (16) and (18) have T as the upper integration limits, which is the period of the voltage signals.
As an example, if we take s 1 = s 2 = 0, then
So the amplitude φ_00_ depends on the complex voltage signals V1,0,Re+iV1,0,Im and V2,0,Re+iV2,0,Im, as the other amplitudes do.
Under the representation scheme in the above, the gate UCRm transforms the input classical state |φ) into the output state
It corresponds to the result in Equation (13), which describes the action of the 2‐qubit quantum gate U^CRm on the quantum state. The proof details are provided in the subhead “The detailed circuit design and the output calculation of CR module” of Experimental Section.
Next, we describe the design of the circuit network UCRm used to implement the transformation in Equation (14). As shown in Figure 1c, UCRm it consists of 3 modules (red boxes), which we refer to as “CR modules”. The first CR module receives input voltage signals V1,1,Re and V1,1,Im, the second incorporates V2,0,Re and V2,0,Im among its inputs, while the third operates with V2,1,Re and V2,1,Im.The remaining 2 input signals V1,0,Re and V1,0,Im remain fixed. In addition, Vl,Re and Vl,Im are externally applied single‐frequency cosine and sine signals, respectively. Their frequency is set to match the highest spectral component within the combined spectra of all the voltage signals.
Figure 1d illustrates a certain CR module whose outputs V1,1,Re′ and V1,1,Im′ are defined by Equation (14). To achieve V1,1,Re′, we multiply Vl,Re and V1,1,Re through the multiplier module (marked by “ × ”) to obtain Vl,ReV1,1,Re, and multiply Vl,Im and V1,1,Im to obtain Vl,ImV1,1,Im. These two resultant signals are then subtracted through the adder module (marked by “+ ”), producing the final output Vl,ReV1,1,Re−Vl,ImV1,1,Im. The left component voltage signals follow the analogous procedure, but the adder modules in these cases incorporate additional input signals.
One CR module consists of 4 multiplier modules and 2 adder modules, and we illustrate one certain multiplier module and one certain adder module. Generally, each multiplier module contains 1 analog multiplier (represented by pentagon) and 2 resistor (represented by rectangle), while each adder modules contains 1 analog adder (represented by triangle) and varying numbers resistor (represented by rectangle), with the resistor count dependent on the number of input signals to the analog adder. The design details of the module and its calculation results are provided in the subhead “The detailed circuit design and the output calculation of CR module” of Experimental Section.
It is well known that generating quantum entanglements is the key function of the 2‐qubit quantum gate, therefore our 2‐cebit circuit gate needs to have analogous effects. Now we analyze the classical correlation in our circuit design from two aspects. Mathematically, it manifests in the operational equivalence between the classical gates described in Equation (20) and the quantum gates in Equation (13). Physically, since entanglement typically originates from interactions that can be mathematically characterized through multiplication operation, the multiplication introduced in our circuit generates similar interaction‐like effects. In the following section, we will provide experimental evidence.
After the discussion of the circuit correspondence of the quantum gates in low‐qubit systems, we now consider scaling the system up to n cebit, which can be thought of as an analog of an n‐qubit system. When the number of cebit increases to n, the implementation of the two types of circuit gates is required to be generalized properly based on the above designs. Since the gates depend on the definition of the classical states obtained by the voltage signals, we first address how the definition evolves when scaling from a 2‐cebit to an n‐cebit system.
In the n‐cebit circuit, the input voltage signals for each cebit are denoted as Vk⃗=(Vk,0,Re,Vk,0,Im,Vk,1,Re,Vk,1,Im)T(k = 1, 2, ⋅⋅⋅, n). The classical state is obtained from the complex voltage signals as
where the subscripts *s_k_
- take the value 0 or 1, so φ has 2^ n ^ subscripts. We denote the successive convolution operation by the symbol “∏*”, which is defined as
Following the discussion on the evolution of the definition of the classical states, we now address the modifications to the *U_H_
- gate and the UCRm gate when scaling to the n‐cebit system. The design of *U_H_
- gate remains consistent in the n‐cebit system. To implement *U_H_
- gate on the k 0‐th cebit, we feed the input voltage signals of the k 0‐th cebit into the *U_H_
- gate, while we keep the voltage signals of all other cebits unchanged. The *U_H_
- gate transforms the classical state into
This expression corresponds to the result of extending Equation (12) to the n‐cebit system. Detailed calculations are provided in the subhead “The Detailed Circuit Design of 1‐Cebit Gate (Adder Module)” of Experimental Section This expression also corresponds to the action result of the 1‐qubit Hadamard gate U^H in the n‐qubit system
where φsk0=0 should be understood as selecting the components when the subscript sk0=0 from the entire set of φs1s2…sn, and then forming a column vector composed of these selected components. And so are φsk0=1, ϕsk0=0 and ϕsk0=1.
During the extension of the UCRm gate to the n‐cebit system, we uncover an intriguing property, that the circuit system can efficiently implement the classical correlations among multiple cebits. We first talk about the multi‐qubit entanglement in quantum system. As is shown in Figure 2a, the multi‐qubit entangled operation U^CR in QFT is constructed by cascading multiple U^CRm gate
a) Quantum circuit for the n‐qubit QFT. b) Classical circuit simulating the n‐qubit QFT.
Here U^k→k+l(l = 1, 2, ⋅⋅⋅, n − k) represents a controlled‐phase U^CRm gate with the k‐th qubit being the control qubit and the (k + l)‐th qubit being the target qubit, and the parameter m equals to l + 1. The qubits in U^CRm gate are divided into three part k 0,k 1 and k 2 as followed. In this multi‐qubit entanglement scheme, these U^CRm gates share the same control qubit called k 1. And the (k 1 + 1)‐thto the n‐th qubit are collectively denoted as k 2, since these qubit are the target qubit for one controlled‐phase gate in U^CR. The remain qubits are labeled as k 0, spanning from 1 to k 1 − 1. In quantum system, these gates rely on distinct entanglement correlations between different qubits, and is hard to be implemented with a single quantum operation. However, in classical circuit, such classical correlations among multi‐cebit can be realized straightforwardly. This is achieved using a single *U_CR_
- gate as is shown in Figure 2b, and it transforms these voltage signals into
Similar to the qubits in Equation (26), the cebits are also divided into three parts labeled as k 0,k 1 and k 2, where k 0 spans from 1 to k 1 − 1 and k 2 ranges from k 1 + 1 to n. Here Vl,Re and Vl,Im are externally applied single‐frequency cosine and sine signals, respectively. Their frequency is set to match the highest spectral component within the combined spectra of all the voltage signals. By comparing Equation (27) with Equation (14), it can be observed that the fundamental construction schemes of the *U_CR_
- gate and the UCRm gate are similar, and both are composed of CR modules. In the *U_CR_
- gate, each k 0‐th cebit contains 2 CR modules, each k 1‐th contains 1 CR module, and each k 2‐th cebit contains 2 CR modules. Using the definition of the classical states in Equation (22), the result of the *U_CR_
- gate corresponds to the U^CR gate. The detailed computing process is provided in Method (B).
Using the circuit gates mentioned above, the circuit simulation of the QFT can be realized. As is shown in Figure 2a, the n‐qubit QFT can be implemented using the quantum U^H and U^CRm gates, and the omitted quantum swap gate. By replacing the quantum gates in the quantum circuit with our corresponding circuit designs, the classical circuit simulation is achieved, as is shown in Figure 2b. For visual simplicity, the 4 input signals for each cebit are merged into a single line. In circuit simulation, we omit the swap gates too.
Now, we briefly describe the QFT simulation in the classical circuit using the classical basic state as an example. Since the definition of the classical states obtained by the voltage signals has been established, we no longer describe the voltage signals, but instead focus solely on the evolution of the classical state. The input classical basic state is expressed as
where the decimal representation K is rewritten as the binary representation K1K2…Kn¯.
At first, the *U_H_
- gate acts on the input state as
We rewrite it as
Here we employ the binary fractional notation
For example, 0.K1¯=K1/2.
Next, the *U_CR_
- gate acts on the classical state as
The component |1) of the classical state |K 1) has a 2π/2Kk phase shift controlled by the k‐th cebit, transforming |K 1) into |K′1). Subsequent gates similarly transform |K 2) into |K′2), transform |K 3) into |K′3), and so on, but these gates no longer change the state |K′1). And we have
After the SWAP gate, the final circuit output is
Now we consider the amplitude of one basic state |J1J2…Jn¯). Each *J_j_
- term induces a phase shift Δθ_ j _ = Jj2π0.Kn−j+1…Kn¯, so the phase shift of |J1J2…Jn¯) is
Here
is an integer. The symbol “ ≡ ” in Equation (35) means that the two sides of the symbol differ by an integer multiple of 2π, thus they induce identical phase shifts. Also the phase shift in Equation (35) is equivalent to the phase shift in Equation (1). Based on the linear properties of the circuit system, the correspondence to Equation (2) arises naturally, and we successfully realize the QFT simulation in the classical circuit.
We emphasize that the speed‐up in QFT arises from quantum entanglement, which enables a single quantum gate to process all information contained in a quantum state in parallel, thereby drastically reducing computing resource demands. Analogously, our circuit design achieves a similar parallel speed‐up by introducing a novel definition of the classical states based on correlated voltage signals, emulating classical correlations. This allows a single analog circuit component to efficiently process all information in parallel. For example, in the 2‐cebit circuit simulation of QFT, the input classical state
is transformed into the output state
which can be further rotated into a classical state |00)+|11)2 corresponding to a quantum Bell state |00⟩+|11⟩2 via two 1‐cebit gates acts on the 1‐st and the 2‐nd cebit respectively
Therefore, it is able to exhibit similar properties analogous to the quantum Bell state. The experimental demonstrations are given in the following section. This result shows the presence of the entanglement‐like correlation in the circuit system, and reveals the intrinsic source of the speed‐up effect in our circuit simulation scheme.
At the end of this section, we discuss the computational complexity of our circuit design. In quantum system, computational complexity is considered proportional to the number of quantum gates. Similarly in classical system, computational complexity should depend on the number of basic computing components in the circuit. However, we emphasize that multiple circuit components can be integrated into a single component, and such an integrated component clearly cannot be regarded as a basic computing component. Therefore, to start it, we need to define the basic computing component in our circuit design.
The definition of the basic computing component is based on the mathematical operations it performs. In our circuit design, we only use 3 kinds of basic computing components. The first is the wire, performing copy operation that maps one function f into two identical functions f. The second is the analog adder, performing addition (subtraction) operation that maps two functions f 1 and f 2 into one function f 1 ± f 2. The last is the analog multiplier, performing a multiplication operation that maps two functions f 1 and f 2 into one function f 1 × f 2. Thus, the computational complexity in our circuit design is determined by the number of the basic computing components employed.
Our n‐cebit circuit design consists of *n U_H_
- gate and n − 1 *U_CR_
- gate. Each *U_H_
- gate contains 4 analog adders, while each *U_CR_
- gate contains O(n) analog multipliers and O(n) analog adders. Consequently, an n‐cebit simulation circuit requires a total of O(n ^2^) fundamental analog circuit components. This matches the O(n ^2^) quantum gates needed for the n‐qubit QFT quantum circuit, and outperforms the O(n2^ n ^) = O(Nlog N) elementary operations of FFT.
After comparing the algorithm complexity among the circuit scheme, QFT and FFT, we additionally consider the processing time required per individual circuit component to compare these FT scheme in terms of process time. In our design, a circuit component operates on the voltage signals composed of sine and cosine voltage signals of different frequencies. The period of the voltage signals is denoted as T = 2π/ω as is in the above text, where the frequency ω is a fixed parameter set before the circuit is built. Although the output signal of the circuit component contains more frequency signals, its period remains T. According to Equation (22), we only need to extract a signal segment of duration T from each voltage signal to perform computation. The voltage signal outside the interval from time 0 to time T is redundant and should not be counted in the processing time. Consequently, the total complexity of this circuit design can be calculated as the processing time T required by the circuit components multiplied by the algorithm complexity O(n ^2^), and its order remains at the order of O(n ^2^). That is, the computation time of this circuit design scales proportionally with the hardware complexity of the circuit.
In next section, we present several circuit simulation experiments of simulating QFT to validate the correctness of our circuit design. We also experimentally verify the existence of the correspondence between the classical correlation within the designed circuit and the quantum entanglement in the quantum system.
Experimental Demonstration of the Circuit Simulation for QFT
3
We begin with the circuit simulation of the 2‐qubit QFT. The schematic diagram of the 2‐cebit simulation circuit is shown in Figure 3a, consisting of 2 *U_H_
- gates and 1 UCR2 gate. The UCR2 gate includes 2 submodules u 1 and u 2 (marked by the red boxes). The u _1_submodule acts on the control cebit and contains 1 CR module, while the u _2_submodule acts on the target cebit and contains 2 CR modules. The corresponding PCB layouts for these circuit gates are provided in Figure 3b–d. On the PCB boards, we mark the adder modules by “+ ” and the multiplier modules by “ × ”, consistent with the designs in Figure 1b,d. In these modules, the operational amplifiers used are model LM358, with each LM358 chip integrating 2 operational amplifiers. The analog multipliers employed are model AD633. The initial voltage signals in the experiment are generated using an FY2300 signal generator.
a) The schematic diagram of the 2‐cebit simulation circuit. b) The PCB layouts for the UH gate. c,d) The PCB layouts for the UCR2 gate.
We validate our circuit design using the following 5 input states in the 2‐cebit system. These input states correspond to the initial voltage signal configurations listed below (voltage unit is V, and ω is set to 1kHz).
where we define
The theoretical and experimental results are provided in Figure 4. From top to bottom, the panels correspond to the input states |00), |10), |01), |11) and |0 +). The left column displays the real parts of the results, while the right column displays the imaginary parts. The horizontal axis represents the states, while the vertical axis represents the amplitudes. The blue bar plots represent the theoretical results of QFT
while the orange bar plots represent the experimental results, consistent with the theoretical results. Among these classical states, the mathematical form of Equation (50) corresponds to the quantum entangled state 2|00⟩+(1−i)|01⟩+(1+i)|11⟩22. That is, our constructed classical correlation in circuits is a concept different from the quantum correlations that are generally believed to exist only in quantum systems, but their mathematical forms are the same. In fact, not only do they have the same mathematical form, but they can also exhibit similar physical properties.
The theoretical and experimental results of the circuit simulation of the 2‐qubit QFT.
It is well known that there are typically two approaches to characterize the quantum correlations of entangled states, one using violation of the Bell inequality and the other using entanglement entropy. Similarly, the correlation properties of our constructed classical correlated states in circuits can also be tested by two corresponding ways. We first discuss the circuit version of the violation of the Bell inequality. Its adaptation requires projective measurements on the state corresponding to the Bell‐like state along three directions θ_1_,θ_2_, and θ_3_, and substitute the measurements into the classical version of the Bell‐like inequality
where P(θ_1_,θ_2_) represents the correlated measurement outcome when the first cebit is measured along θ_1_ and the second qubit along θ_2_. In traditional classical systems, this inequality cannot be violated.
In our circuit experiment, we first rotate the output state of the input state |0 +) into a classical state corresponding to the quantum Bell‐like state via two 1‐cebit gate described in Equation (39), and subsequently perform Bell‐like inequality measurements on the classical state corresponding to the quantum Bell state. Figure 5a,b show the variation of P(θ′, θ) with θ under different parameter θ′. For parameters θ_1_ = 0, θ_2_ = π/3 and θ_3_ = 2π/3, we obtain P(θ_1_,θ_2_) = 0.51, P(θ_1_,θ_3_) = −0.39 and P(θ_2_,θ_3_) = 0.51. Consequently, the inequality in Equation (51) is violated. This means that although our constructed classical correlation in circuits is the concept different from the quantum correlations, it has a correlation relationship corresponding to the quantum correlations.
a,b) The variation of the correlated measurement outcomes P(θ′, θ) with θ under different parameter θ′. The blue line represents the theoretical results, while the red error bars represent the experimental results. c) The classical density matrix of the output classical state when the input classical state is |0 +) and the corresponding quantum density matrix. From left to right, the subfigures represent the real part of the classical density matrix of the experimental results, the real part of the quantum density matrix of the theoretical results, the imaginary part of the classical density matrix of the experimental results and the imaginary part of the quantum density matrix of the theoretical results.
Now, we analyze the circuit version of the entanglement entropy. Its classical version requires the density matrix, which can be obtained through state tomography. The mathematical framework of state tomography remains unchanged, where projective measurements on the output state are performed on 4 states |0), |1), | +) and |L) for each cebit and the density matrix of the output state can then be resconstructed from these projective measurements results. However, these projective measurement operations require adaptation for classical implementation. In our circuit design, the correspondence to projective measurements can be divided into two step, the correspondence to projection and to the measurement. The 1‐cebit gate rotations implement the projection step, for example, the *U_H_
- gate projects |0) to | +) and |1) to | −). And the operation that define the classical states by the voltage signals corresponds to the measurement step, for example, the amplitude φ′00 = 1/2 in Equation (46) indicates that the measured amplitude of the output voltage signal projected to |00) state is 1/2. Figure 5c presents the experimentally reconstructed classical density matrix ρ_ e _ and the corresponding theoretical quantum density matrix ρ^t. From left to right, the subfigures represent the real part of the classical density matrix of the experimental results, the real part of the quantum density matrix of the theoretical results, the imaginary part of the classical density matrix of the experimental results and the imaginary part of the quantum density matrix of the theoretical results.
Using the classical density matrix ρ_ e _ of the output state, we compute the reduced classical density matrix ρ_ e,1_ and calculate the classical correlation corresponding to the quantum entanglement entropy
These results also support the correspondence between the classical correlation among classical states of the electric circuits and the quantum entanglement in the quantum system.
Based on the correspondence between classical correlation and quantum entanglement, our circuit design can be extended to scenarios with more cebits. We demonstrate the scalability of our circuit design through the two examples, the circuit simulation of 3‐qubit QFT and the theoretical simulation of 5‐qubit QFT. Figure 6 shows the schematic diagram of the 3‐cebit simulation circuit, which consists of 3 *U_H_
- gates and 2*U_CR_
- gate. The first *U_CR_
- gate consists of 3 submodule called u 1,u 2 and u 3, the second *U_CR_
- gate consists of u 4,u 5 and u 6. The submodules u 1 and u 5 act on the control cebit, containing 1 CR module. The submodules u 2,u 3 and u 6 act on the target cebit, containing 2 CR modules. And the submodule u 4 acts on the other cebit, containing 2 CR modules. The PCB layouts for these CR modules share a similar design with the PCB layouts shown in Figure 3c,d, but their specific configurations differ, as is shown in Method (B).
The schematic diagram of the 3‐cebit simulation circuit.
Theoretically, our 3‐cebit circuit is able to simulate the 3‐qubit QFT for arbitrary input states. For testing purposes, we arbitrarily selected a 3‐cebit state
It corresponds to following initial voltage configuration (voltage unit is V, and ω is set to 1kHz)
The theoretical and experimental results are provided in Figure 7. The top subfigure displays the real parts of the results, while the bottom subfigure displays the imaginary parts of the results. The horizontal axis represents the states, with the vertical axis representing the amplitudes. The blue bar plots represent the theoretical results of QFT, and the orange bar plots represent the experimental results, consistent with the theoretical results.
The theoretical and experimental results of the circuit simulation of the 3‐qubit QFT.
Similarly, Figure 8 displays the schematic diagram of the 5‐cebit simulation circuit. As discussed above, each circuit gate (blue and orange boxes) contains polynomial number of basic computing components. In this theoretical simulation, we arbitrarily select a 5‐cebit state
The schematic diagram of the 5‐cebit simulation circuit.
The theoretical results and the simulation results are provided in Figure 9, with the accuracy of the circuit components configured to 1%. The top subfigure displays the real parts of the results, while the bottom subfigure displays the imaginary parts of the results. The horizontal axis represents the index of the states, with the vertical axis representing the amplitudes. The blue bar plots represent the theoretical results of QFT, and the orange bar plots represent the simulation results, consistent with the theoretical results.
The theoretical results and the simulation results of the circuit simulation of the 5‐qubit QFT.
Discussion and Conclusion
4
We have realized the circuit simulation of QFT, where the number of the basic computing components required in out circuit design matches that of quantum gates in the quantum circuit. The correctness of the 2‐cebit, 3‐cebit and 5‐cebit circuit simulation schemes has been validated. We summarize the principles underlying the speedup achieved by our simulation scheme as follows.
First, based on previous researches on classical correlation, we employ the correlated circuit wave systems as the experimental platform, which provides the foundation for demonstrating classical correlation in the systems. Second, we have successfully developed a novel definition of the classical states by the voltage signals, which mathematically corresponds to quantum entanglement, establishing the theoretical basis for our experiments. Within this scheme, a single computing component, processes all information in the waveform across one circuit channels, as one operation, enabling parallel computation over the entire dataset and thereby generating speedup. Notably, this parallel speedup relies on the existence of the novel classical correlations, thus traditional classical computing systems lacking such correlations cannot achieve this speedup. In traditional classical algorithms, significant time is consumed by operations such as permutation and selection within the input data itself. In contrast, the scheme presented in this work eliminates the need for any internal manipulation of the input data, requiring only global operations in the entire dataset.
Leveraging the mature, stable, and scalable nature of circuit platforms, our quantum‐inspired computing scheme based on circuit holds the potential to circumvent the challenges faced by quantum platforms and open a new way toward advanced information processing with high quality and efficiency. Furthermore, our work highlights the significant potential of analog computing in parallel speedup, which can be further optimized to realize practical speedup effects.
Experimental Section
5
The Detailed Circuit Design of 1‐Cebit Gate (Adder Module)
The 1‐cebit gate is an important basic gate in circuit design, and here the detailed design of the arbitrarily 1‐cebit gate is illustrated. It consists of 4 adder modules shown in Figure 10. Each adder module contains 4 inputs, 1 operational amplifier, at most 11 resistors, and 1 output. The add module is referred to as “add circuit”, performing weighted addition (and subtraction) operations on the input voltage signals.
The circuit design of the arbitrarily 1‐cebit gate.
According to Kirchhoff's law,
is observed. Subsequently, by combining the properties of operational amplifier that
is obtained
where
By adjusting the resistance values, V out can be configured as an arbitrary linear superposition of the inputs, thereby realizing any 1‐cebit gate. For example, in a 4‐input 4‐output circuit, the resistance values are adjusted for output V1,0,Re′ to (the resistance unit is kΩ)
Resistors not explicitly mentioned are disconnected from the circuit, and
is observed. Similar configurations are applied to the remaining 3 outputs
Resistors not explicitly mentioned are disconnected from the circuit, and the *U_H_
- gate is obtained
In the experiment circuit, specific resistance values can be achieved through rounding and series‐parallel combinations of resistors.
Furthermore, this adder module can be extended to contain any number of input signals, with the output equaling the weighted sum of all inputs. Since the underlying principle remains consistent, further elaboration is omitted here.
In the last, the detailed calculation for the 1‐cebit gate *U_H_ *, and the arbitrary 1‐cebit gate *U_R_ *, in n‐cebit system are discussed. The *U_H_
- gate on the k 0‐thcebit transforms the voltage signals into
where a 1 to a 4 and b 1 to b 4 are adjustable circuit parameter. This expression is the result of extending Equation (6) to the n‐cebit system. Using the n‐cebit definition of the classical states in Equation (22), is observe
is observed, namely
where φsk0=0 should be understood as selecting the components where the subscript sk0=0 from the entire set of φs1s2…sn, and then forming a column vector composed of these selected components. And so are φsk0=1.
The computing details of the 4‐input 1‐input adder module are discussed. It can be simply extended to scenarios with additional inputs and outputs.
The Detailed Circuit Design and the Output Calculation of CR Module
The controlled phase gate UCRm (and *U_CR_ *) are another kind of important basic gate in the design of circuit. This kind of gate consists of CR modules, and here the detailed design of the CR modules is illustrated. Figure 11 shows one simple CR module, that contains 4 inputs, 4 analog multiplier, 2 operational amplifier, 24 resistors (8 in red box and 16 in green box) and 2 output.
The circuit design of one certain CR module. It consists of analog multipliers (red box) and adder modules (green box).
Here s = 0 or 1, and the red box marks the fixed structure of the analog multiplier, with the output
The red box marks the adder modules, with the output
where C 1 and C 2 depend on the resistance values. If the resistance values are adjusted to
and resistors not explicitly mentioned are disconnected from the circuit, then
is observed. Take k = 1 and s = 1, and V1,1,Re′ in the main text in Equation (14) is achieved. By adjusting the resistance values and the circuit connection, the voltage signals transformation in Equations (14) and (27) can be achieved. More generally, it can achieved
where the coefficients C depend on the resistance values in the adder module.
In the last, it is demonstrated that the output classical states of the *U_CR_
- gate correspond to the results of quantum U^CR gate. In the k‐th cebit, suppose that Vk,s,Re and Vk,s,Im consists of sine waves and cosine waves with W different frequencies
or equivalently expressed as
And the fixed inputs in the multiplier module are set as
The output voltage signals of the k 1‐th cebit are
or equivalently expressed as
where
Since the output signals share the same mathematical structure as the input signals, it can be directly utilized as the input signals for the subsequent circuit gate.
The output voltage signals of the k 0‐th cebit and the k 2‐thcebit are
or equivalently expressed as
where
and
Since the output signals share the same mathematical structure as the input signals, it can be directly utilized as the input signals for the subsequent circuit gate. Using the n‐cebit definition of the classical states in Equation (22),
is observed. Note that the convolution operation has the following property
When sk1=0,
is observed, such that for any values of sk0 and sk2,
is observed. When sk1=1,
is observed, where m = k 2 − k 1 + 1, and
is observed. In other words, under the condition sk1=1, each term of sk2=1 in the subscript of the classical state function φ introduces a phase shift of 2π/2^ m ^(m = k 2 − k 1 + 1) in φ′. While in the U^CR gate, each term of sk2=1 in the subscript of the quantum state ϕ corresponds to an U^CRm gate, which also introduces a 2π/2^ m ^ phase shift in ϕ′. Therefore, both the classical *U_CR_
- gate and the quantum U^CRm gate introduce identical phase shifts by the same subscript terms in their respective state functions, resulting in equivalent operational outcomes. This confirms that the circuit *U_CR_
- gate corresponds to the quantum U^CRm gate.
Conflict of Interest
The authors declare no conflict of interest.
Supporting information
Supporting Information
The reference list from the paper itself. Each links out to its DOI / PubMed record.
- 1J. W. Cooley , J. W. Tukey , Math. Comp. 1965, 19, 297.
- 2P. Duhamel , M. Vetterli , Signal Processing 1990, 19, 259.
- 3G. G. Kumar , S. K. Sahoo , P. K. Meher , Circuits Syst Signal Process 2019, 38, 5665.
- 4P. W. Shor , in Proceedings 35th Annual Symposium on Foundations of Computer Science , IEEE, Piscataway, NJ 1994, pp. 124–134.
- 5R. B. Griffiths , C.‐S. Niu , Phys. Rev. Lett. 1996, 76, 3228.10060907 10.1103/Phys Rev Lett.76.3228 · doi ↗ · pubmed ↗
- 6A. Ekert , R. Jozsa , Rev. Mod. Phys. 1996, 68, 733.
- 7R. Jozsa , Proc. R. Soc. Lond. A 1998, 454, 323.
- 8D. Coppersmith , ar Xiv 2002, 10.48550/ar Xiv.quant-ph/0201067. · doi ↗