# Research on Open Magnetic Shielding Packaging for STT and SOT-MRAM

## TL;DR

This paper introduces a new magnetic shielding design for MRAM to protect against external magnetic fields, improving its reliability and compatibility with various packaging needs.

## Contribution

The novel open magnetic shielding structure effectively reduces in-plane and perpendicular magnetic fields for both STT and SOT-MRAM.

## Key findings

- The shielding reduces in-plane magnetic fields to nearly 1‰ of their original intensity at the chip level.
- Perpendicular magnetic fields are reduced to 2‰ of their initial strength.
- The shielding performance is independent of packaging height, enabling compatibility with multi-layer chip stacks.

## Abstract

As an emerging type of non-volatile memory, magneto-resistive random access memory (MRAM) stands out for its exceptional reliability and rapid read–write speeds, thereby garnering considerable attention within the industry. The memory cell architecture of MRAM is centered around the magnetic tunnel junction (MTJ), which, however, is prone to interference from external magnetic fields—a limitation that restricts its application in demanding environments. To address this challenge, we propose an innovative open magnetic shielding structure. This design demonstrates remarkable shielding efficacy against both in-plane and perpendicular magnetic fields, effectively catering to the magnetic shielding demands of both spin-transfer torque (STT) and spin–orbit torque (SOT) MRAM. Finite element magnetic simulations reveal that when subjected to an in-plane magnetic field of 40 mT, the magnetic field intensity at the chip level is reduced to nearly 1‰ of its original value. Similarly, under a perpendicular magnetic field of 40 mT, the magnetic field at the chip is reduced to 2‰ of its initial strength. Such reductions significantly enhance the anti-magnetic capabilities of MRAM. Moreover, the magnetic shielding performance remains unaffected by the height of the packaging structure, ensuring compatibility with various chip stack packaging requirements across different layers. The research presented in this paper holds immense significance for the realization of highly reliable magnetic shielding packaging solutions for MRAM.