# Low-Power Branch CNN Hardware Accelerator with Early Exit for UAV Disaster Detection Using 16 nm CMOS Technology

## TL;DR

This paper introduces a low-power hardware accelerator for disaster detection using drones, achieving high accuracy and efficiency.

## Contribution

The novel B-CNN architecture with branch training and early exit mechanism enables efficient disaster detection in aerial imagery.

## Key findings

- The B-CNN hardware accelerator operates at 500 MHz with 37.56 mW power consumption.
- The system achieves 88.18% disaster prediction accuracy.
- Power gating techniques effectively manage memory power consumption in the 16 nm CMOS design.

## Abstract

This paper presents a disaster detection framework based on aerial imagery, utilizing a Branch Convolutional Neural Network (B-CNN) to enhance feature learning efficiency. The B-CNN architecture incorporates branch training, enabling effective training and inference with reduced model parameters. To further optimize resource usage, the framework integrates DoReFa-Net for weight quantization and fixed-point parameter representation. An early exit mechanism is introduced to support low-latency, energy-efficient predictions. The proposed B-CNN hardware accelerator is implemented using TSMC 16 nm CMOS technology, incorporating power gating techniques to manage memory power consumption. Post-layout simulations demonstrate that the proposed hardware accelerator operates at 500 MHz with a power consumption of 37.56 mW. The system achieves a disaster prediction accuracy of 88.18%, highlighting its effectiveness and suitability for low-power, real-time applications in aerial disaster monitoring.