# Optimizing Energy/Current Fluctuation of RF-Powered Secure Adiabatic Logic for IoT Devices

## TL;DR

This paper introduces an optimized adiabatic logic design for IoT devices that reduces energy consumption and improves security against power analysis attacks.

## Contribution

A novel adiabatic logic design is proposed to minimize energy and current fluctuations while enhancing security in RF-powered IoT systems.

## Key findings

- The proposed design reduces energy variation and improves resistance to power analysis attacks.
- Lower power dissipation is achieved compared to conventional adiabatic logic designs.
- The design performs well at load capacitances of 50 fF and 100 fF.

## Abstract

The advancement of Internet of Things (IoT) technology has enabled battery-powered devices to be deployed across a wide range of applications; however, it also introduces challenges such as high energy consumption and security vulnerabilities. To address these issues, adiabatic logic circuits offer a promising solution for achieving energy efficiency and enhancing the security of IoT devices. Adiabatic logic circuits are well suited for energy harvesting systems, especially in applications such as sensor nodes, RFID tags, and other IoT implementations. In these systems, the harvested bipolar sinusoidal RF power is directly used as the power supply for the adiabatic logic circuit. However, adiabatic circuits require a peak detector to provide bulk biasing for pMOS transistors. To meet this requirement, a diode-connected MOS transistor-based voltage doubler circuit is used to convert the sinusoidal input into a usable DC signal. In this paper, we propose a novel adiabatic logic design that maintains low power consumption while optimizing energy and current fluctuations across various input transitions. By ensuring uniform and complementary current flow in each transition within the logic circuit’s functional blocks, the design reduces energy variation and enhances resistance against power analysis attacks. Evaluation under different clock frequencies and load capacitances demonstrates that the proposed adiabatic logic circuit exhibits lower fluctuation and improved security, particularly at load capacitances of 50 fF and 100 fF. The results show that the proposed circuit achieves lower power dissipation compared to conventional designs. As an application example, we implemented an ultrasonic transmitter circuit within a LoRaWAN network at the end-node sensor level, which serves as both a communication protocol and system architecture for long-range communication systems.