# A High-Density 4H-SiC MOSFET Based on a Buried Field Limiting Ring with Low Qgd and Ron

## TL;DR

This paper introduces a new 4H-SiC MOSFET design that improves performance by reducing gate charge and increasing efficiency.

## Contribution

The novel split trench structure with a grounded P+ shield region significantly reduces Qgd and increases FoM in 4H-SiC MOSFETs.

## Key findings

- The peak electric field near the gate oxide is almost completely suppressed.
- The proposed device achieves a 78% reduction in Qgd and a 108% increase in FoM.
- The device cell pitch can be reduced to 1.8 μm with a Ron below 0.94 mΩ·cm2.

## Abstract

In this study, we propose an optimized shield gate trench 4H-SiC structure with effective gate oxide protection. The proposed device has a split trench with a P+ shield region, and the P+ shield is grounded by the middle deep trench. Our simulation results show that the peak electric field near the gate oxide is almost completely suppressed. Compared with a conventional P+ shield device, our proposed structure achieves a 78% reduction in the Qgd and a 108% increase in the FoM (figure of merit) simultaneously. Additionally, it is estimated that the device cell pitch can be reduced to 1.8 μm with a Ron below 0.94 mΩ·cm2, in theory. These demonstrated device performance metrics, as well as its simple structure and good compatibility, make our proposed SiC MOSFET highly attractive for future high-performance applications.