# An On-Chip Balun Using Planar Spiral Inductors Based on Glass Wafer-Level IPD Technology

## TL;DR

This paper introduces a compact on-chip balun using glass wafer-level IPD technology for high-performance microsystems.

## Contribution

The novel design combines planar spiral inductors and capacitors for miniaturization and integration on glass substrates.

## Key findings

- The balun achieves a −15 dB return loss bandwidth from 2.07 GHz to 4.30 GHz.
- It has a maximum insertion loss of 2.56 dB and amplitude imbalance under 2.04 dB.
- The phase difference is 180 ± 14.02° with a CMRR above 19.08 dB.

## Abstract

As integrated electronic microsystems advance, their internal components demonstrate increasing miniaturization, higher-density integration, and, consequently, significantly enhanced performance. This paper presents an on-chip transformer balun. The balun has a combination of planar coupled inductors and filtering capacitors using integrated passive device (IPD) technology, giving it the advantages of a more compact circuit size and lower cost to achieve single-ended to differential function on glass substrates. Moreover, it can be integrated in systems by flip-chip. The die has a size of 1.81 mm × 1.36 mm with a −15 dB single-ended return loss bandwidth of 2.07 GHz to 4.30 GHz. Within this bandwidth, the maximum insertion loss is 2.56 dB, and the amplitude imbalance is less than 2.04 dB. The phase difference between the differential signals is 180 ± 14.02° and the common mode rejection ratio (CMRR) is above 19.08 dB. The balun has the potential of miniaturization for integration on package or through-glass interposers (TGIs).