Design and implementation of a module for teaching and research on SCRs for power electronics

TL;DR

This paper introduces an educational and research module focused on silicon controlled rectifiers (SCRs) for power electronics, covering experiments of varying complexity.

Contribution

The paper presents a novel experimental module for teaching and researching SCRs in power systems with diverse experiment designs.

Findings

Low-complexity experiments successfully implemented phase control rectifiers and AC–AC voltage controllers.

High-complexity experiments demonstrated the use of SCRs in DC transmission and reactive power compensation.

Results align with theoretical expectations for all proposed experiments.

Abstract

The conversion of energy is a fundamental aspect for adequate use of energy resources; thus, counting on appropriate devices and methodologies in education and research is essential. This document presents an experimental module for teaching and research on silicon controlled rectifiers (SCRs) in power systems, where different experiments designed to cover a diverse range of complexities are also proposed. In low complexity, the experiments focus on implementing phase control rectifiers and three-phase AC–AC voltage controllers, with particular attention to passive loads. On the other hand, in the field of high complexity, the experiments delve into the application of full-wave phase control three-phase rectifiers in direct current transmission systems, as well as the use of AC–AC voltage controllers in static reactive power compensators. The results show that the desired behavior is achieved according to the theory for the different experiments proposed.

Figures

HBSGD circuit with: (a) each SCR and the gate driver, (b) simplified symbol of each SCR and its gate driver.

Power diodes used in the module.Fig. 3Internal structure of $[eqn]$ .

ZCDLD circuit block diagram.

ZCDLD circuit waveforms.

Attenuator scheme for $[eqn]$ .

Sine-square converter circuit $[eqn]$ .

Waveforms of $[eqn]$ , $[eqn]$ and $[eqn]$ .

Impulse generator of $[eqn]$ .

Waveforms of $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ .

Waveforms of $[eqn]$ and $[eqn]$ .

Circuit to boost $[eqn]$ current.

Electrical diagram of the experimental SCR module.

Assembly of the PCBs, power supplies, and front panel of the SCR module.

TPFWR with load $[eqn]$ - $[eqn]$ . (a) Simplified schematic diagram. (b) Connections on the front panel of the module.Fig. 17Waveforms for $[eqn]$ , and $[eqn]$ for TPFWR with $[eqn]$ - $[eqn]$ load. (a) Simulation; $[eqn]$ : 50 V/div, $[eqn]$ : 0.5 A/div. (b) Experimental results.

DCST circuit implementation. (a) Simplified schematic diagram. (b) Connections on the front panels of the two modules.Fig. 19Waveforms for $[eqn]$ , $[eqn]$ , and $[eqn]$ for DCST. (a) Simulation for $[eqn]$ , and $[eqn]$ : 100 V/div, $[eqn]$ : 1 A/div. (b) Experimental results.

TPHWR with load $[eqn]$ . (a) Simplified schematic diagram. (b) Connections on the front panel of the module.Fig. 21Waveforms $[eqn]$ , and $[eqn]$ for TPHWR with $[eqn]$ load. (a) Simulation; $[eqn]$ : 50 V/div, $[eqn]$ : 0.5 A/div. (b) Experimental results.

TPVC in star configuration. (a) simplified schematic diagram. (b) Connections on the front panel of the module.Fig. 23Waveforms $[eqn]$ , and $[eqn]$ for TPVC in star configuration. (a) Simulation; $[eqn]$ , and $[eqn]$ : 50 V/div (b) Experimental results.

RPSC single-phase implementation. (a) simplified schematic diagram. (b) Connections on the front panel of the module.Table 2Power factor in the single-phase static reactive compensator.PF (Experimental)PF (Simulation) $[eqn]$ 0.8680.896 $[eqn]$ 0.8680.896 $[eqn]$ 0.8700.897 $[eqn]$ 0.8780.905 $[eqn]$ 0.8900.917 $[eqn]$ 0.9060.933 $[eqn]$ 0.9320.953 $[eqn]$ 0.9600.974 $[eqn]$ 0.9800.991 $[eqn]$ 0.9920.999 $[eqn]$

Full text

Specifications table

Hardware nameSCRs didactic module for power electronicsSubject area $[eqn]$ Electrical engineering $[eqn]$ Educational and research toolsHardware type $[eqn]$ Electrical engineering and computer science $[eqn]$ Power electronicsClosest commercial analog $[eqn]$ LEYBOLD ^Ⓡ^ Uncontrolled/controlled rectifier circuits $[eqn]$ DE LORENZO - ELECTRONIC DEVICES Training SystemsOpen source licenseCC-BY-NC 4.0Cost of hardware*$ 300 USD.*Source file repositoryhttps://doi.org/10.17632/vfsj3zhsgf.2

Hardware in context

1

In a global context where the rational use of energy is an issue of relevant magnitude, having the appropriate methodologies and devices to carry out the different experiments in education and research is a fundamental aspect of energy conversion; thus, this document addresses energy conversion circuits employing SCRs as a switching element, which was developed by General Electric in 1957. Even though considered an old semiconductor in the area of power electronics, it stands out as the currently most robust semiconductor. The SCR can handle the highest amount of power compared to other semiconductors such as BJTs, MOSFETs, and IGBTs, among others [1]. SCRs are available on the market with voltage and current values that reach thousands of volts and amps. Meanwhile, direct current transmission lines employ series-connected line-triggered SCRs. In this way, SCRs are employed in inverters and rectifiers that interconnect AC systems and DC transmission lines capable of carrying among 1 kA and 1 MV [2]. For this reason, students of first course on electrical and electronic engineering must know the SCR and its various applications in circuits that operate with line voltages of 50–60 Hz [3], these circuits are phase control rectifiers and AC–AC voltage controllers. Such rectifiers are commonly used for various applications including controlled power supplies, electrochemical processes, traction equipment, and motor drivers. Conversely, standard applications in AC–AC voltage controllers include lighting and heating control, dual feeders, dynamic voltage reclosers, static compensators, online transformer winding switching, soft starting, and speed control of motor drives for pumps and fans, among others [1], [3].

However, most universities lack of didactic modules for circuit implementation in the laboratory; as a result, students are forced to build them by themselves. This situation causes problems such as high costs and extensive construction times, commuting inconveniences, and a shortage of SCRs-related lab opportunities. On the other hand, SCRs modules are available on the market; however, many of these are expensive and need more control systems to trigger the SCRs, which limits the possibility of carrying out more complex experiments.

Related hardware works

1.1

Regarding development of issues related to experimental module works in education and investigation on power-electronics, Ref. [4] introduces an execution of a power-electronic remote-laboratory (ELEPOT-rLab); such experiments are capable of accomplishing actual power-electronic converter on the Internet. Remotely, users are able to control the testing and obtain graphical results of the measurements instantly.

In power electronics, a proposal and experimental project carried out by groups of students, and a teaching and problem-based learning experience is presented in [5] for using electronic equipment in consumer and industrial applications to accompany professional training progressively.

Some teaching-related issues on power electronics in higher education training courses are displayed in [6] presenting a modular methodology for teaching three-phase thyristor rectifiers. A MATLAB equation solver simulator was developed regarding the detailed physical operation of three-phase thyristor rectifiers. The developed simulator considers aspects like control parameter variations, the effects generated on the supply network, continuity and discontinuity, and commutation.

An experimental platform for teaching AC–DC converters in the subject of power electronics of the Federal University of Uberlândia (FUU), Brazil was proposed in [7]. The platform consists of either controlled or uncontrolled three-phase rectifier. The integrated circuit TCA785 is used to control the operation of the SCRs.

A concept of Education 4.0 is introduced in [8] including experiments using power electronics in real time; clearly, such concept requires current methodological education to be promoted to Education 4.0; thus, the authors of [8] work toward the association of new experiments in the laboratory, including real-time oscilloscope (remote/call) unit, augmented reality unit, and Internet of things (IoT) base unit.

Besides, [9] introduces EZ-TBOARD, which is an experimentation system that quickens the learning process to basic applicability and operation of semiconductor transistors. In the training board, throughout a reconfigurable and compact design, students obtain the necessary help to configure amplification and switching schemes, and the major different biasing in every kind of three terminal transistors aiming to dedicate all the attention only on those key aspects related to device and application circuit theory, which promotes student’s higher analysis capacity to reconfigure and design a circuit when a specific action is required.

Finally in the context of education, a flexible didactic platform for thyristor-based circuits is displayed in [10]. The proposed module allows the construction of various topologies including thyristor bridge rectifiers and solid-state relays, among others. The operation of a controlled rectifier is taken as an example of teaching applications to evidence their functional and didactic use.

Regarding to SCRs models based on state-space averaging techniques, authors in [11] apply the modeling method employing the concept of duty-ratio constraint to represent the rectifier’s electrical behavior in continuous and discontinuous operating modes. From a computer simulation with the average and the switching models the results are presented for both conditions, namely, steady-state and transient state.

Focus and document organization

1.2

This work proposes an experimental module for teaching and research of SCRs in power systems. The approach involves a series of experiments designed to encompass diverse complexities. In low complexity, the experiments focus on implementing phase control rectifiers and three-phase AC–AC voltage controllers emphasizing passive loads. On the other hand, highly complex experiments delve into the use of full-wave phase control three-phase rectifiers within direct current transmission systems and the application of AC–AC voltage controllers in static compensating systems of reactive power. This variety of experiments provide a comprehensive understanding of SCRs, from their fundamental applications to advanced uses in more complex power systems. This work seeks to generate a reference framework for developing experiments with SCRs in the field of open-source teaching and research, allowing access to the resources used to implement circuits and programming software in the DSP.

In the paper the hardware description occurs in Section 2, the operation of the Half Bridge SCR Gate Driver (HBSGD) circuit is presented in Section 2.1. The design of the HBSGD circuit is detailed in Section 2.2, followed by the description of the operation of the Zero Crossing Detector Led Driver (ZCDLD) circuit in Section 2.3, and its respective design in Section 2.4. Section 3 displays the design files summary, the bill of materials summary in Section 4, and the build instructions in Section 5. Meanwhile, Section 6 shows the operation instructions, and Section 7 the validation and characterization allowing to observe the performance of the proposed experiments. Finally, the discussion and conclusions regarding the results are presented in Sections 8, and 9.

Hardware description

2

This section presents the detailed analysis, design, and implementation of the hardware, starting with the operation analysis and design of the Half Bridge SCR Gate Driver circuit. It is followed by a description of the operation of the Zero Crossing Detector Led Driver and its design.

HBSGD circuit operation

2.1

The proposed HBSGD circuit is depicted in Fig. 1(a); hereafter, its representation is the simplified symbol version of the SCR and its GD, as illustrated in Fig. 1(b). The junction of the $[eqn]$ anode with the $[eqn]$ cathode forms the $[eqn]$ terminal, the $[eqn]$ cathode is designated as the $[eqn]$ terminal, and the $[eqn]$ anode is referred to as the $[eqn]$ terminal.

This form of connection generates a highly versatile half-bridge of SCRs since it allows the synthesis of a variety of circuits with SCRs that can be classified into two groups, namely, phase control rectifiers and AC–AC voltage controllers, which can be six-phase, three-phase, two-phase and single-phase, depending on the number of HBSGDs used.Fig. 1HBSGD circuit with: (a) each SCR and the gate driver, (b) simplified symbol of each SCR and its gate driver.

In this article, a flexible SCR module is proposed for research and teaching with three HBSGDs. Full-wave and half-wave phase control rectifiers can be configured using the power diodes in Fig. 2 and AC–AC voltage controllers, these rectifiers and controllers can be, at most, three-phase.

The standard circuit for turning on the SCR, most commonly used in phase control rectifiers and AC–AC voltage controllers is a voltage source controlled in series with a resistor; however, the current produced by this circuit that flows through the gate presents variations as the gate and the cathode form a P-N junction that is highly sensitive to temperature changes, consequently, in the HBSGD the gates of the SCRs are driven using a controlled current source to avoid this inconvenience.

It is worth noting that $[eqn]$ and $[eqn]$ are identical circuits, therefore, $[eqn]$ and $[eqn]$ are similar to $[eqn]$ and $[eqn]$ respectively. Fig. 3 shows the $[eqn]$ circuit, which comprises various components. $[eqn]$ is the power semiconductor SCR; $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ and $[eqn]$ constitutes a current-controlled source that generates the required and sufficient gate current value to transition the SCR from the off-state to the on-state. The optocoupler transistor $[eqn]$ controls the turning on and off of the current source through the optocoupler LED. The LED current flows through $[eqn]$ and is governed by the ZCDLD circuit.Fig. 2. Power diodes used in the module.Fig. 3. Internal structure of $[eqn]$ .

HBSGD circuit design

2.2

The selection of $[eqn]$ depends on the average anode forward current ( $[eqn]$ ), when in “on state”, and the voltage stress in “off state”, which is directly proportional to the peak line voltage ( $[eqn]$ ). It is assumed that $[eqn]$ operates in the circuit HBSGD with values for $[eqn]$ of 1 A and $[eqn]$ corresponding to 294 V. On the other hand, the considerations include the maximum average anode direct current ( $[eqn]$ ), the maximum forward anode-to-cathode voltage ( $[eqn]$ ), and the maximum reverse anode-to-cathode voltage ( $[eqn]$ ). Nevertheless, either of the two voltages is taken into account, as datasheets specify equal maximum values for both forward and reverse anode-to-cathode voltages.

The maximum junction and case temperature allowed for $[eqn]$ is reached when $[eqn]$ is equal to $[eqn]$ , for this reason, it is recommended to select $[eqn]$ with a $[eqn]$ that meets the condition:

$$[eqn]$$

the voltage $[eqn]$ is chosen high enough so that if $[eqn]$ rises, it allows a suitable margin of safety, therefore, $[eqn]$ is selected 30% above the peak line voltage, namely:

$$[eqn]$$

hence, the device SCR TYN412 is chosen for $[eqn]$ , since it meets these conditions; likewise, the power diode 6A4 is selected for $[eqn]$ , $[eqn]$ and $[eqn]$ having a breakdown voltage and average anode direct current similar to the chosen SCR.

The current pulse injected into the gate of $[eqn]$ must be sufficiently high to ensure a secure turn-on. Additionally, it should have a duration that suffices to prevent undesired turning off right after turning it on [1]. In order to determine the required gate current pulse magnitude to ensure the activation of $[eqn]$ , it is necessary to guarantee that the gate voltage ( $[eqn]$ ) and gate current ( $[eqn]$ ) exceeds the gate threshold voltage ( $[eqn]$ ) and threshold current ( $[eqn]$ ), respectively. The threshold voltage and current values can be found in the datasheet for $[eqn]$ . In this way, the current pulse $[eqn]$ injected into the gate must meet the condition:

$$[eqn]$$

where $[eqn]$ is the gate threshold current $[eqn]$ equals to 15 mA, then, if condition (3) is met, the condition:

$$[eqn]$$

is also fulfilled, where $[eqn]$ and $[eqn]$ are the operating and gate threshold voltages of $[eqn]$ respectively. In this case $[eqn]$ is equal to 0.7 V. In order to avoid damage or destroy $[eqn]$ , the gate operating power ( $[eqn]$ ) must not exceed the maximum gate operating power ( $[eqn]$ ) also listed in the datasheet of $[eqn]$ , therefore, the gate operating power ( $[eqn]$ ) must meet the condition:

$$[eqn]$$

where $[eqn]$ is the maximum gate operating power, which is equal to 1 W. Consequently, $[eqn]$ equal to 20 mA is chosen to fulfill the condition (3) having a $[eqn]$ of 0.8 V, which is obtained experimentally in the laboratory and meets the condition (4). The values of $[eqn]$ and $[eqn]$ produce a $[eqn]$ equal to 16 mW that meets the condition (5).

To continue the design process, it was considered a 5 V for supply voltage ( $[eqn]$ ) for the circuit $[eqn]$ , typically found in phone charges widely used and low cost. The bipolar transistor 2N2907 is selected for $[eqn]$ , the diode 1N4001 for $[eqn]$ to $[eqn]$ , likewise, the optocoupler PC817. These are low-cost and easy to purchase devices at electronic component stores and distributors. Regarding Fig. 3, the expression that defines $[eqn]$ is given by:

$$[eqn]$$

since $[eqn]$ , $[eqn]$ , and the base-emitter of $[eqn]$ are P-N junctions, it is assumed that they have the same forward voltage, namely:

$$[eqn]$$

substituting (7) in (6) it is obtained:

$$[eqn]$$

The base-to-collector leakage current at $[eqn]$ can cause a gate current greater than zero when $[eqn]$ is off, which is why the resistor $[eqn]$ is connected between the emitter and the base of $[eqn]$ to guarantee a voltage $[eqn]$ to zero forcing $[eqn]$ to turn off. On the other hand, the resistance $[eqn]$ , connected between the gate and the cathode, leads to a decrease in the possibility of turn-on due to voltage derivative, a reduction in turn-off time, and an increase in holding and latching currents in $[eqn]$ . Regarding Fig. 3, the current $[eqn]$ is given by:

$$[eqn]$$

likewise, the current flowing through $[eqn]$ , corresponds to:

$$[eqn]$$

where $[eqn]$ , and $[eqn]$ are the minimum forward current gain and the collector current in $[eqn]$ respectively. To ensure that the currents passing through $[eqn]$ and $[eqn]$ are less than 10% of $[eqn]$ are selected $[eqn]$ 0.7 mA and $[eqn]$ 0.25 mA satisfying this criterion. The value of $[eqn]$ is found around 0.7 V, regarding that $[eqn]$ (Fig. 3) for an operation in active region (with a collector current of 20 mA) the approximate value of $[eqn]$ given by the manufacturer is 120; however, the worst scenario was considered for the design, which occurs when $[eqn]$ reduces until a value where $[eqn]$ operates on the border between the saturation and active regions. In the laboratory, it is experimentally determined that $[eqn]$ is equal to 40 for a range of $[eqn]$ between 20 mA and 25 mA. Substituting these values into Eq. (9), and (10) the current $[eqn]$ is obtained. Meanwhile, considering Fig. 3, and Eq. (8), the current that flows through $[eqn]$ is given by:

$$[eqn]$$

in this way, it can be stated that $[eqn]$ is independent of $[eqn]$ , and since $[eqn]$ is proportional to $[eqn]$ , then, $[eqn]$ is a constant current source that solely depends on the voltage $[eqn]$ and the resistance $[eqn]$ , which can be determined by solving for $[eqn]$ in (11) having:

$$[eqn]$$

meanwhile, the resistances $[eqn]$ , and $[eqn]$ , are given by:

$$[eqn]$$ $$[eqn]$$

the average power dissipated by $[eqn]$ is given by

$$[eqn]$$

since the maximum power that the bipolar transistor 2N2907 (employed for $[eqn]$ ) can dissipate is 625 mW, this device can operate with the power calculated in (15) without damage. Regarding Fig. 3, the current $[eqn]$ is gyven by:

$$[eqn]$$

aiming at maintaining $[eqn]$ and $[eqn]$ in the full conduction region, in which the forward voltage of the two diodes is between 0.6 V and 0.8 V according to datasheet, the following criterion is established for the selection of the current that flows through the two diodes:

$$[eqn]$$

in this way, it is selected $[eqn]$ equal to 2.2 mA fulfilling the criteria established in (17); therefore, the current flowing through $[eqn]$ is equal to 3.4 mA. On the other hand, the maximum collector-to-emitter voltage $[eqn]$ when $[eqn]$ is in saturation, according to the PC817 datasheet, is equal to 0.2 V. Therefore, regarding Fig. 3 the resistance $[eqn]$ is given by:

$$[eqn]$$

According to the PC817 datasheet, the minimum current transfer rate and maximum forward voltage $[eqn]$ of the emitter diode are equal to 0.5 mA and 1.4 V, respectively. Due to this transfer rate, the emitter diode current $[eqn]$ is equal to 6.8 mA. Reviewing Fig. 3, $[eqn]$ is a square signal with a frequency of 60 Hz and a variation range between $[eqn]$ and $[eqn]$ , which produces the current $[eqn]$ when it is $[eqn]$ . This current flows through $[eqn]$ causing the saturation of $[eqn]$ . Since $[eqn]$ is a signal produced by LAUNCHXL-F28069M development board that operates with 3.3 V, then $[eqn]$ is equal to this value, in this way, the resistance $[eqn]$ is given by:

$$[eqn]$$

According to above, the current consumed by the $[eqn]$ circuit of $[eqn]$ is the sum of $[eqn]$ and $[eqn]$ , which is equal to 23.85 mA, therefore, it is recommended to select a mobile phone battery charger capable of supplying current 30% above of this value. The resistors $[eqn]$ - $[eqn]$ are chosen to handle a power of 0.25 W and they are close to commercial values easy to obtain in electronic component stores and distributors. The devices $[eqn]$ , $[eqn]$ , $[eqn]$ and the optocoupler PC817 operate with voltages and currents within the ranges specified by their respective datasheets.

ZCDLD circuit operation

2.3

The function of the circuit ZCDLD displayed in Fig. 4 is to manage the on and off of the current sources of the three HBSGD circuits to switch the SCRs from off to on state. For this, the development board LAUNCHXL-F28069M generates six signals $[eqn]$ synchronized with the rising and falling zero crossings of the sinusoidal signals processed by the blocks $[eqn]$ , $[eqn]$ and $[eqn]$ ; hence, these blocks produce pulse signals as inputs to the development board to determine when the zero crossings occur.

The $[eqn]$ block processes the difference of the sinusoidal signals entering terminals $[eqn]$ and $[eqn]$ to originate pulses $[eqn]$ and $[eqn]$ , each time the difference between $[eqn]$ and $[eqn]$ crosses zero on the rising and falling, respectively. The $[eqn]$ block processes the difference of the sinusoidal signals entering terminals $[eqn]$ and $[eqn]$ to produce pulses $[eqn]$ and $[eqn]$ , whenever the difference between $[eqn]$ and $[eqn]$ crosses zero on the rising and falling, respectively. The $[eqn]$ block processes the difference of the sinusoidal signals entering terminals $[eqn]$ and $[eqn]$ to generate pulses $[eqn]$ and $[eqn]$ , every time the difference between $[eqn]$ and $[eqn]$ crosses zero on the rising and falling, respectively. In these signals, the subscript $[eqn]$ refers to rising, and the subscript $[eqn]$ refers to falling. The six impulses $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ and $[eqn]$ enter the ports $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ and $[eqn]$ to synchronize the signals $[eqn]$ that enter the LED driver (LD) block, the six impulses also enter the OR block. The output $[eqn]$ enters the port $[eqn]$ to start the analog-digital conversion of the voltage generated by the potentiometer $[eqn]$ , which enters through the port $[eqn]$ . The potentiometer allows the variation of the delay angle $[eqn]$ that changes between $[eqn]$ and $[eqn]$ when the variable terminal of the potentiometer changes between 0 V and $[eqn]$ , respectively. The outputs of the LD block enter the $[eqn]$ terminals of the optocouplers of the three HBSGD circuits. Therefore, the LAUNCHXL-F28069M development board governs the turning on and off of the current sources in all three HBSGD circuits. It should be noted that each $[eqn]$ is synchronized by its respective impulse produced by the zero crossing of the respective processed signal as is displayed in Fig. 5.Fig. 4ZCDLD circuit block diagram.

From the above, taking $[eqn]$ , each $[eqn]$ , and $[eqn]$ with its synchronizing pulse and type of zero crossing of the processed signal are presented in Table 1. The symbol $[eqn]$ denotes rising zero crossing, whereas the symbol $[eqn]$ represents falling zero crossing, on the other hand, the sinusoidal entering the terminals $[eqn]$ , $[eqn]$ and $[eqn]$ is a phase voltage. The sinusoidal entering the terminals $[eqn]$ , $[eqn]$ and $[eqn]$ , can be a phase or neutral voltage, depending on the configuration of the three HBSGD circuits.Fig. 5ZCDLD circuit waveforms.

Table 1. Relationship between the $[eqn]$ , $[eqn]$ , and the characteristics of the processed signals.ProcessedZeroGenerated $[eqn]$ $[eqn]$ signalcrossingimpulse $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$ $[eqn]$

ZCDLD circuit design

2.4

Each block $[eqn]$ , $[eqn]$ and $[eqn]$ is composed of an attenuator, a sine-to-square signal converter and a pulse generator. In Fig. 6 the attenuator is displayed $[eqn]$ , which is an operational amplifier configured as a band-pass filter in differential mode, this filter has been selected for four main objectives: firstly, to attenuate the difference of the sinusoidal waves that enter the terminals $[eqn]$ and $[eqn]$ ; secondly, galvanically isolate using the dielectric barrier method to electrically separate $[eqn]$ and $[eqn]$ from ZCDLD cirquit, eliminating any physical connection between them and thus guaranteeing the electrical safety and noise reduction of the ZCDLD circuit; thirdly, reject high frequencies coming from $[eqn]$ and $[eqn]$ , for the purpose of preventing malfunction or damage to the ZCDLD circuit; finally, the use of the dielectric barrier method is a more economical and efficient alternative to the use of transformers to achieve galvanic isolation. For a band-pass filter in differential mode, it is established that the resistances $[eqn]$ and $[eqn]$ are similar, just like $[eqn]$ and $[eqn]$ , also the capacities $[eqn]$ and $[eqn]$ are identical, as well as $[eqn]$ and $[eqn]$ .

In Fig. 8 the input signals ( $[eqn]$ ) can be observed, and also the attenuator output signal ( $[eqn]$ ), which are sinusoidal signals with a period $[eqn]$ . Since the operational amplifier works with a single power supply the signal $[eqn]$ is displaced by a direct component, then, $[eqn]$ is given by:

$$[eqn]$$

where, $[eqn]$ corresponds to:

$$[eqn]$$

in this equation $[eqn]$ and $[eqn]$ are the cut-off frequencies of the high-pass and low-pass transfer functions, respectively. These cut-off frequencies determine the bandwidth of the resulting band-pass filter and are given by:

$$[eqn]$$ $$[eqn]$$

aiming to ensuring that the frequency $[eqn]$ of the difference between the sinusoidal signals that enter the terminals $[eqn]$ and $[eqn]$ is within the passband of the attenuator, it is necessary to meet the conditions:

$$[eqn]$$

therefore, (21) can be approximated as:

$$[eqn]$$

considering that, the maximum voltage of the difference $[eqn]$ of sinusoidal signals that enter the terminals $[eqn]$ and $[eqn]$ is equal to 300 V, the maximum voltage allowed $[eqn]$ of the signal $[eqn]$ is equal to 1.1 V, and assuming $[eqn]$ of 1 kΩ, it can be determined $[eqn]$ from Eq. (25),

$$[eqn]$$

with the objective of meeting the condition established in (24), the values of $[eqn]$ and $[eqn]$ are chosen equal to 3.6 rad and 10 000 rad, respectively, therefore, solving $[eqn]$ and $[eqn]$ from (22), (23) is obtained:

$$[eqn]$$ $$[eqn]$$

Since the configuration of the operational amplifier in the attenuator is a band-pass filter in differential mode, it is taken $[eqn]$ , $[eqn]$ , $[eqn]$ and $[eqn]$ . The operational amplifier employed is the TLV2374 as it provides the ability to take the output from rail to rail and has a bandwidth of 3 MHz; in addition, it can operate with low supply voltage.Fig. 6. Attenuator scheme for $[eqn]$ .

The signal $[eqn]$ is entered into the sine-square converter circuit $[eqn]$ , which is shown in Fig. 7. This converter is a comparator configured as a Schmitt trigger chosen for two main purposes: firstly to turn $[eqn]$ into a square signal, and secondly to avoid multiple transitions at the converter’s output ( $[eqn]$ ) due to oscillations present in $[eqn]$ near the point $[eqn]$ . These oscillations are generated simultaneously by the fluctuations that appear in the difference of the sinusoidal waves that enter the terminals $[eqn]$ and $[eqn]$ near to the zero crossing point.

In this way $[eqn]$ is a square sign that varies between $[eqn]$ and $[eqn]$ , as displayed in Fig. 8. The transitions in $[eqn]$ occur at low voltage threshold $[eqn]$ and high voltage $[eqn]$ given by:

$$[eqn]$$ $$[eqn]$$

the transition of $[eqn]$ to $[eqn]$ in $[eqn]$ occurs when $[eqn]$ changes from its minimum value to its maximum value and reaches the value of $[eqn]$ ; likewise, the transition form $[eqn]$ to $[eqn]$ in $[eqn]$ occurs when $[eqn]$ changes from its maximum value to its minimum value and reaches the value of $[eqn]$ . Meanwhile, the hysteresis $[eqn]$ and the midpoint $[eqn]$ of the hysteresis are given by:

$$[eqn]$$ $$[eqn]$$

solving $[eqn]$ and $[eqn]$ from Eqs. (31), and (32) is obtained:

$$[eqn]$$ $$[eqn]$$

Fig. 7. Sine-square converter circuit $[eqn]$ .

Considering that fluctuations occur in the difference of the sinusoidal waves that enter the terminals $[eqn]$ and $[eqn]$ near the zero crossing point, with maximum amplitude of approximately 2% of the maximum value of the line voltage, it is selected $[eqn]$ equal to 40 mV. Likewise, assuming $[eqn]$ with the value $[eqn]$ and substituting in Eqs. (33), and (34) the values of $[eqn]$ and $[eqn]$ are equal to 1.63 V and 1.67 V respectively. Since these values are very close to $[eqn]$ , it can be stated that the down and up transitions in signal $[eqn]$ shown in Fig. 8 occur approximately in $[eqn]$ and $[eqn]$ respectively. Finally, choosing $[eqn]$ equal to 1.8 kΩ and solving (29), (30), the values of $[eqn]$ and $[eqn]$ are equal to 150 kΩ and 1.5 kΩ. The comparator integrated circuit used for the sine to square signal converter is the LM339, which is low cost, offers the ability to operate with low supply voltage, and is easy to purchase in electronic component stores and distributors.Fig. 8. Waveforms of $[eqn]$ , $[eqn]$ and $[eqn]$ .

In Fig. 9 the impulse generator $[eqn]$ is shown composed of two XOR gates, two high-pass networks with diode and two buffer circuits with Schmitt trigger, where the signal $[eqn]$ is the input. The upper XOR gate acts as a buffer, while the lower XOR gate acts as a negator, so, $[eqn]$ and $[eqn]$ are square signals that enter their corresponding high-pass network, originating the impulses $[eqn]$ and $[eqn]$ respectively. The diodes $[eqn]$ and $[eqn]$ of the RC networks prevent negative excursions in these impulses. The impulses $[eqn]$ and $[eqn]$ that are not square are processed by their corresponding buffer with a Schmitt trigger to transform them into square impulses $[eqn]$ and $[eqn]$ respectively. The two high-pass networks with diode are similar, for this reason, the values of their resistors and capacitors are identical as well as the commercial references of their diodes; on the other hand, each buffer is implemented using two inverters in cascade with Schmitt trigger.

Regarding Fig. 8, Fig. 10, during the positive half-cycle of the sinusoidal $[eqn]$ , the signal $[eqn]$ is held at 0, while the signal $[eqn]$ is maintained at $[eqn]$ . Conversely, during the negative half-cycle of the sinusoidal $[eqn]$ , the opposite occurs, where the signal $[eqn]$ is set to $[eqn]$ , while the signal $[eqn]$ is set to 0. The $[eqn]$ and $[eqn]$ impulses are generated when a transition from $[eqn]$ to $[eqn]$ occurs in $[eqn]$ and $[eqn]$ , respectively. These impulses are given by:

$$[eqn]$$ $$[eqn]$$

where the value of $[eqn]$ is equal to 3.3 V and the time constant is given by:

$$[eqn]$$

Fig. 9. Impulse generator of $[eqn]$ .

In Fig. 10, the transition from $[eqn]$ to $[eqn]$ in signal $[eqn]$ occurs when $[eqn]$ changes from $[eqn]$ to $[eqn]$ and reaches the value of $[eqn]$ , however, since this change is overly fast, the transitions from $[eqn]$ to $[eqn]$ in both $[eqn]$ and $[eqn]$ occurs almost simultaneously at $[eqn]$ ; likewise, the transition from $[eqn]$ to $[eqn]$ in signal $[eqn]$ occurs in $[eqn]$ when $[eqn]$ decreases exponentially from $[eqn]$ to $[eqn]$ and reaches the value of $[eqn]$ . Transitions in $[eqn]$ occur in the same way in relation to the variations in signal $[eqn]$ .

According to datasheet for the LAUNCHXL-F28069M development board, the cycle time (SYSCLKOUT) is 11.11 ns, for the operating frequency of 90 MHz. As mentioned previously, the signals $[eqn]$ are synchronized using impulses $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ . According to the datasheet, the minimum required width of these pulses is twice SYSCLKOUT, therefore, the pulse width time $[eqn]$ must be much larger than the minimum pulse width, namely:

$$[eqn]$$

then, selecting $[eqn]$ equal to 110 µs that meets the condition (38). Furthermore, according to Fig. 10 when evaluating Eq. (36) in $[eqn]$ is obtained:

$$[eqn]$$

solving $[eqn]$ from Eq. (39), is obtained:

$$[eqn]$$

choosing $[eqn]$ equal to 10 nF, and calculating $[eqn]$ from Eq. (40) is found that:

$$[eqn]$$

since both high-pass networks are identical, then, $[eqn]$ and $[eqn]$ . Meanwhile the XOR gate corresponds to the integrated circuit 74HC86. The inverter circuit to implement the buffer with Schmitt trigger is the CD40106, and the diode 1N4148 is selected for $[eqn]$ , and $[eqn]$ . These components are low cost and easy to purchase at electronic component stores and distributors.Fig. 10. Waveforms of $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ .

The attenuator, the sine-to-square signal converter, and pulse generator within blocks $[eqn]$ and $[eqn]$ operate in the same way as in block $[eqn]$ (above explained), thus generating impulses $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ .

According to Table 1, each signal $[eqn]$ is synchronized with its respective impulse; in the case of the $[eqn]$ is the impulse $[eqn]$ . Regarding Fig. 11, at $[eqn]$ a transition from $[eqn]$ to $[eqn]$ occurs in $[eqn]$ initiating the delay time ( $[eqn]$ ). During $[eqn]$ , $[eqn]$ remains at $[eqn]$ . At the end of $[eqn]$ , $[eqn]$ transitions from $[eqn]$ to $[eqn]$ , then holds at $[eqn]$ until $[eqn]$ . Exactly in $[eqn]$ signal $[eqn]$ transitions from $[eqn]$ to $[eqn]$ remaining in $[eqn]$ until $[eqn]$ , when another transition from $[eqn]$ to $[eqn]$ occurs in signal $[eqn]$ , in this way $[eqn]$ starts again.

The delay angle $[eqn]$ is related to the delay time $[eqn]$ by the form:

$$[eqn]$$

where $[eqn]$ is the period of the sinusoidal signal $[eqn]$ . On the other hand, the minimum and maximum values of $[eqn]$ are equal to $[eqn]$ and $[eqn]$ respectively; therefore, the angular interval of $[eqn]$ is defined by:

$$[eqn]$$

The signals $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ work in a similar way as described above and their waveforms have amplitude and pulse width similar to the waveform of $[eqn]$ in Fig. 11; however, they are displaced due to the respective impulses that synchronize them, as indicated in Table 1.Fig. 11. Waveforms of $[eqn]$ and $[eqn]$ .

The maximum current of the six $[eqn]$ in source mode is 4 mA. However, in Section 2.2, it is established that the $[eqn]$ in the HBSGD circuit is 6.8 mA. For this reason, the LD block is required, which consists of six circuits, each responsible for boosting the current of the respective signals $[eqn]$ . Fig. 12 displays the circuit that reinforces the current of $[eqn]$ . The bipolar transistor $[eqn]$ corresponds to 2N2222, and the bipolar transistor $[eqn]$ is the 2N2907. These transistors are low cost and easy to purchase in electronic component stores and distributors. Since $[eqn]$ and $[eqn]$ are complementary bipolar transistors, their minimum forward current gains $[eqn]$ , and $[eqn]$ are identical and equal to 40. To simplify the analysis, the saturation collector-to-emitter voltages on both transistors approach zero.

On the other hand, $[eqn]$ ensures a voltage of 0 V at terminal $[eqn]$ when $[eqn]$ is in the cut-off region, while $[eqn]$ maintains an emitter-to-base voltage in $[eqn]$ below the threshold to ensure it remains in the cut-off region when $[eqn]$ is also in cut-off region. $[eqn]$ is selected as 1 kΩ; hence, the current flowing through $[eqn]$ is given by:

$$[eqn]$$

in this way, the collector current $[eqn]$ corresponds to:

$$[eqn]$$

to guarantee reduced voltages collector-to-emitter in $[eqn]$ , and emitter-to-collector in $[eqn]$ when these transistors are in the saturation region, it is required to meet the following conditions:

$$[eqn]$$ $$[eqn]$$

where $[eqn]$ and $[eqn]$ are the minimum direct current forced gains of $[eqn]$ and $[eqn]$ respectively. Assuming a $[eqn]$ equal to $[eqn]$ that meets condition (47), the base current of $[eqn]$ is given by:

$$[eqn]$$

choosing $[eqn]$ to be 4.7 kΩ and assuming a $[eqn]$ of 0.7 V, and regarding Fig. 12, the collector current in $[eqn]$ is given by:

$$[eqn]$$

in this way the resistance $[eqn]$ is given by:

$$[eqn]$$

In order to maintain the base-to-emitter voltage of $[eqn]$ below the threshold (to ensure that $[eqn]$ is in the cut-off region), it is necessary that $[eqn]$ is not overly high; in this way, taking a $[eqn]$ equal to 2.13 the condition (46) is met producing a base current in $[eqn]$ defined by:

$$[eqn]$$

assuming a $[eqn]$ equal to 0.7 V, the resistance $[eqn]$ is given by:

$$[eqn]$$

the resistances $[eqn]$ to $[eqn]$ are chosen to dissipate a maximum power of 0.25 W, the capacitors $[eqn]$ to $[eqn]$ can be ceramic or polyester, the semiconductor devices $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ operate with voltages and currents that are within the ranges specified by their corresponding datasheets.Fig. 12. Circuit to boost $[eqn]$ current.

Design files summary

3

The Gerber files corresponding to the PCBs, the projects in Altium, and the schematic diagrams of the HBSGD and ZCDLD circuits are available to implement the experimental SCRs module. Additionally, the source codes related to the LAUNCHXL-F28069M development board are provided.

Design filenameFile typeOpen source licenseLocation of the fileSCRs_experimental_module.CCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2microprocessor_initialization.CCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2ZCDLDschematic.PDFCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2HBSGDschematic.PDFCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2ZCDLDgerbers.ZIPCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2HBSGDgerbers.ZIPCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2ZCDLDproject.ZIPCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2HBSGDproject.ZIPCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2ZCDLDcomponentlist.XLSXCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2HBSGDcomponentlist.XLSXCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2ANOTHERcomponentlist.XLSXCC-BY-NC 4.0https://doi.org/10.17632/vfsj3zhsgf.2

The description of the above mentioned files is as follows:

• •SCRs_experimental_module: Main code that runs on the development board microprocessor LAUNCHXL-F28069M.
• •microprocessor_initialization: Code to set clocks PWMs, ADC, and comparators, as well as the microprocessor’s interrupt vector.
• •ZCDLDschematic: Electrical circuit diagram ZCDLD implemented in the PCB.
• •HBSGDschematic: Electrical circuit diagram HBSGD implemented in the PCB.
• •ZCDLDgerbers: ZIP archive with the PCB Gerber files for circuit ZCDLD.
• •HBSGDgerbers: ZIP archive with the PCB Gerber files for circuit HBSGD.
• •ZCDLDproject: ZIP archive with the PCB project files in Altium for circuit ZCDLD.
• •HBSGDproject: ZIP archive with the PCB project files in Altium for circuit HBSGD.
• •ZCDLDcomponentlist: List of electronic circuit components ZCDLD.
• •HBSGDcomponentlist: List of electronic circuit components HBSGD.
• •ANOTHERcomponentlist: List of other components external to the circuits ZCDLD, and HBSGD.

Bill of materials summary

4

The list of components is separated into three parts, namely, components for the HBSGD circuit, components for the ZCDLD circuit, and other additional components. Complete lists of materials are available in the repository [12].

Build instructions

5

This section describes the build instructions, in the first part general guidelines are addressed; then the interconnection of the HBSGD and ZCDLD circuits and finally the implementation of the PCBs circuits.

General guidelines

5.1

Printed Circuit Boards (PCBs) can be manufactured by a company specialized in prototyping and assembly, by sending the Gerber files available in the repository [12]. The assembly of the components on the PCBs can be done manually with care, using standard assembly techniques and appropriate tools, such as a soldering iron with a temperature regulator, high-quality solder and a PCB holder.

The interconnection between the three HBSGD circuits, the ZCDLD circuit, the three power diodes, the seven 5 V power supplies, as well as other components of the module are described in Section 5.2.

It is important to prevent high current leads from the HBSGDs from crossing over the ZCDLD circuit as this may cause malfunctions due to Electromagnetic Interference (EMI). Since the potentiometer is located outside the ZCDLD circuit, the line carrying the voltage to $[eqn]$ to vary $[eqn]$ may be susceptible to EMI, which could cause malfunctions in the ZCDLD. Therefore, the potentiometer leads must be shielded to minimize this EMI, and they must be kept away from the HBSGDs and their lead (connection) wires.

Interconnection of the HBSGD and ZCDLD circuits

5.2

In Fig. 13, the electrical diagram of the proposed experimental module is shown as composed of three HBSGD, one ZCDLD, three power diodes, and seven power supplies of 5 V (this last is necessary as each gate driver needs an isolated power supply). As can be seen $[eqn]$ and $[eqn]$ are join together to form $[eqn]$ , connecting the anode $[eqn]$ with the cathode of $[eqn]$ , producing the terminal $[eqn]$ . The cathode of $[eqn]$ is designated as terminal $[eqn]$ and the anode of $[eqn]$ is called terminal $[eqn]$ . Meanwhile $[eqn]$ and $[eqn]$ are join together to create $[eqn]$ , connecting the anode of $[eqn]$ with the cathode of $[eqn]$ , which produces the terminal $[eqn]$ . The cathode of $[eqn]$ is designated as terminal $[eqn]$ and the anode of $[eqn]$ is labeled as terminal $[eqn]$ . In the same way $[eqn]$ and $[eqn]$ are employed to form $[eqn]$ , connecting the anode of $[eqn]$ with the cathode of $[eqn]$ , creating the terminal $[eqn]$ , the cathode of $[eqn]$ is designated as terminal $[eqn]$ and the anode $[eqn]$ is called terminal $[eqn]$ . Consequently, the module proposed in this work allows configuring rectifiers and controllers that can be three-phase. Besides the anode connection of $[eqn]$ , $[eqn]$ , and $[eqn]$ produces the terminal $[eqn]$ , while the cathodes of $[eqn]$ , $[eqn]$ , and $[eqn]$ are designated as the terminals $[eqn]$ , $[eqn]$ , and $[eqn]$ respectively; these three power diodes allow configuring single-phase, two-phase or three-phase half-wave phase control rectifiers. The phases of the electrical network enter the module through the fuses $[eqn]$ , $[eqn]$ , and $[eqn]$ , which provide protection against overloads or short circuits. These three fuses have a blowing current value of 3 A. Additionally, the reference of these phases enters directly into the module, therefore, in terminals A, B, C and $[eqn]$ there are the three-phases and the reference of the electrical network, to be connected to the circuits $[eqn]$ , $[eqn]$ , $[eqn]$ , and ZCDLD. The previously mentioned terminals together with the terminals $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ are female banana type.

The power supplies of $[eqn]$ to $[eqn]$ must be galvanically isolated from each other to avoid short circuits between the terminals $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , and $[eqn]$ , since these terminals correspond to the cathodes of the SCRs electrically separated (see Fig. 13) and connected to the negative pole of its corresponding power supply (see Fig. 3). Also, the ZCDLD power supply is required to be galvanically isolated from other sources to ensure electrical safety and reduce noise in ZCDLD. For these reasons, $[eqn]$ to $[eqn]$ are galvanically isolated sources that produce a DC voltage of 5 V from an alternating voltage of 120 V, which supply power to the circuits $[eqn]$ , $[eqn]$ , $[eqn]$ and ZCDLD; these sources are mobile phone battery chargers due to their wide use and low cost. Besides $[eqn]$ - $[eqn]$ are connected through a resistor to the anodes of the light-emitting diodes of the optocouplers $[eqn]$ - $[eqn]$ respectively (see Fig. 3); these signals have the same waveforms $[eqn]$ - $[eqn]$ , even though $[eqn]$ - $[eqn]$ can handle a higher current (in source or sink mode) compared to $[eqn]$ - $[eqn]$ . In addition $[eqn]$ - $[eqn]$ are connected to the cathodes of the emitting diodes of the optocouplers $[eqn]$ - $[eqn]$ respectively, as well as the internal reference of the power supply of the ZCDLD (GND). The potentiometer is used to vary the pulse width of $[eqn]$ - $[eqn]$ , which modifies the value of $[eqn]$ that according to Eq. (42) is directly proportional to $[eqn]$ . This potentiometer is a multiturn type, since it allows highly precise adjustments of $[eqn]$ given by the several full turns of the shaft to go through the full resistance range, it also keeps its resistance setting stable despite changes in temperature, vibration, and other environmental factors.

In the module, the conductors are grouped into two categories (based on the RMS current they carry) to avoid using multiple sizes according to the American Wire Gauge (AWG) standard. The high RMS current conductors are AWG18 and connect to the terminals $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , A, B, C, and N; likewise, they (current conductors) carry the three-phase electrical network to the module. On the other hand, the low RMS current conductors are AWG24 and attached to the terminals $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ , $[eqn]$ - $[eqn]$ , and $[eqn]$ - $[eqn]$ , also, connect the potentiometer with ZCDLD and the direct current lines of the sources $[eqn]$ - $[eqn]$ with $[eqn]$ , $[eqn]$ , $[eqn]$ , and ZCDLD. In addition, the AWG18 conductors are employed to configure the module as a phase control rectifier or AC–AC voltage controller (whether three-phase, two-phase or single-phase). Both ends of these conductors have male banana terminals. Additionally, Fig. 14 displays the connections in detail to facilitate the successful module assembly. It shows the connectors with their respective labels on the PCBs of $[eqn]$ , $[eqn]$ , $[eqn]$ , and the ZCDLD, as well as a suggested layout of the PCBs, power supplies, female banana plugs, power diodes, potentiometer, switch, and the three protection fuses.Fig. 13. Electrical diagram of the experimental SCR module.

Finally, in Fig. 15(a), the female banana connectors on the front panel of the module can be observed. Fig. 15(b) displays the module connected as a three-phase full wave phase control rectifier using the conductors with male banana type terminals; likewise, Fig. 15, Fig. 15 shows the location of the circuits $[eqn]$ , $[eqn]$ , $[eqn]$ , and ZCDLD, as well as the power supplies inside the module. If a cabinet is not available, the module components can be distributed on an acrylic or wooden base.Fig. 14. Assembly of the PCBs, power supplies, and front panel of the SCR module.

Fig. 15(a) Module configurated as three-phase rectifier. (b) Front panel. (c) Circuits $[eqn]$ , and ZCDLD. (d) Module power supplies.

Operation instructions

6

This section provides the procedure for setting and operating the module displaying the general way to carry out a practice (experiment). In the validation and characterization section, the development of different experiments that can be carried out with the module is described. It should be noted that this module was designed to be easy for students and researchers. The following are the steps to operate the module:

• 1.Place the teaching module in a suitable space (workbench) where power is available for operation.
• 2.Prepare the connectors, measurement devices, and the respective loads to be used.
• 3.Set the experiment by selecting and performing the type of connection for the SCRs on the front panel.
• 4.Power up the device and verify the correct operation of the experiment performed.
• 5.Verify the correct operation of the experiment and carry out the respective measurements and data acquisition.
• 6.To finish the experiment, the module must be turned off, the connectors, measuring elements, and loads removed and placed in their respective storage space.

Finally, it is to point out that the module’s front panel is properly labeled, which facilitates the identification of the connections to be made for both students and researchers.

Validation and characterization

7

The SCR module proposed in this document eliminates the need for trainees (students) to build circuits such as phase control rectifiers and AC–AC voltage controllers typically included in power electronics lectures (subjects) in electrical engineering and electronics. This reduces the time and costs associated with component selection and design of Printed Circuit Boards (PCBs), making it easier for learners to study and understand these circuits. In this work, five laboratory experiments were carried out to demonstrate the usefulness and versatility of the SCR module in the implementation of phase control rectifiers, and AC–AC voltage controllers, under various load conditions. In addition, these five experiments were implemented in simulation software to validate the results achieved with the module. The simulation software employed was MATLAB 2018b using “simulink” and the toolbox of “simscape” and “simscape electrical”.

In the first experiment, it is implemented a Three-Phase Full Wave Rectifier (TPFWR), where the load consists of a resistance and inductance in series. The second proposed experiment is essential to understand the functioning of the Direct Current Transmission System (DCTS). The third experiment corresponds to a Three-Phase Half Wave Rectifier (TPHWR) with resistive load. The fourth experiment consists of a Three-Phase Voltage Controller (TPVC) AC–AC with a resistive load arranged in a star configuration. The fifth experiment is relevant to understand the operation of a Reactive Power Static Compensator (RPSCs), employed to keep the power factor close to unity. The parameter $[eqn]$ is significant in all five experiments; however, direct measurement of $[eqn]$ with an oscilloscope is not possible. To overcome this drawback, $[eqn]$ is determined using $[eqn]$ in Eq. (42). Parameter $[eqn]$ is the time interval between the transition from 0 to $[eqn]$ of the generated impulse and the transition from 0 to $[eqn]$ in the respective terminal $[eqn]$ (see Table 1).

First experiment: TPFWR with R-L load

7.1

TPFWR is an AC–DC converter circuit employed in various implementations ranging from small rectifiers to large high voltage direct current transmissions. The circuit is also called a six-pulse phase-controlled rectifier since the output voltage waveform shows six pulses per line period. The TPFWR is used for motor drives, electrochemical processes, controlled power supplies, traction equipment, among others. This subsection shows the use of the proposed SCR module in an electrical or electronic engineering laboratory activity, which consists of connecting a resistance and inductance in series to the output of a TPFWR, as illustrated in Fig. 16(a). The corresponding connections required for its implementation on the SCRs module are shown in Fig. 16(b). The parameters used in this implementation are the following: RMS voltage of 125 V for the power network (A,B,C), a resistance $[eqn]$ equal to 225 Ω, an inductance $[eqn]$ of 1.3 H with an equivalent series resistance of 10 Ω due to losses in copper, and $[eqn]$ equal to $[eqn]$ . The activity begins energizing the module power supply, followed by setting the desired value for $[eqn]$ ; finally the module connects to the power network (A,B,C). Fig. 17 displays the current waveforms $[eqn]$ and the voltage $[eqn]$ in the load, obtained both in simulation and experimentally in the SCRs module. The functionality of the module was checked by comparing the experimental waveforms with the simulated ones. The results show a significant agreement, which allows affirming the effectiveness of the module in this experiment.

Fig. 16TPFWR with load $[eqn]$ - $[eqn]$ . (a) Simplified schematic diagram. (b) Connections on the front panel of the module.Fig. 17. Waveforms for $[eqn]$ , and $[eqn]$ for TPFWR with $[eqn]$ - $[eqn]$ load. (a) Simulation; $[eqn]$ : 50 V/div, $[eqn]$ : 0.5 A/div. (b) Experimental results.

Second experiment: DCST implementation

7.2

The DCST is a system used in direct current transmission lines that allows electrical power transmission over long distances. This consists of two TPFWRs interconnected back to back through an inductance as shown in Fig. 18(a). The angles $[eqn]$ , and $[eqn]$ corresponding to $[eqn]$ , and $[eqn]$ , govern the magnitude and direction of power flow in both TPFWRs. When $[eqn]$ is located in the range of $[eqn]$ to $[eqn]$ , and $[eqn]$ from $[eqn]$ to $[eqn]$ , the $[eqn]$ works as an inverter while $[eqn]$ as a rectifier, causing a flow of power from the system (R,S,T) to the system (A,B,C). On the other hand, when $[eqn]$ is located in the range of $[eqn]$ to $[eqn]$ , and $[eqn]$ from $[eqn]$ to $[eqn]$ , the $[eqn]$ operates as a rectifier while $[eqn]$ as an inverter, causing a power flow from the system (A,B,C) to the system (R,S,T). In conclusion, the electrical grid connected in the input of the TPFWR works as a rectifier supplies power, and the electrical grid connected in the output of the TPFWR operates as an inverter that absorbs this power. This subsection displays the application of the proposed SCR module in an electrical or electronic engineering laboratory activity. The purpose of this activity is to transfer electrical power from the system (R,S,T) to the system (A,B,C) by using the DCST, in this way, Fig. 18(b) shows the necessary connections for its implementation on the two SCR modules. In this activity, the following parameters were used: RMS voltage of 125 V for the grids (A,B,C), and (R,S,T), an inductance $[eqn]$ equal to 1.3 H with an equivalent series resistance of 10 Ω due to losses in the copper, and an average current of 1 A in the inductance. To carry out this activity; first, the power supplies of both modules are energized; second, $[eqn]$ is set to $[eqn]$ , and $[eqn]$ to $[eqn]$ ; third, module 1 is connected to the grid (A,B,C) and module 2 to the grid (R,S,T); finally, $[eqn]$ is reduced until the transferred power or desired average current over the inductance is reached. The operation of the SCR module was corroborated by comparing the experimental waveforms with the simulated ones. Fig. 19 shows inductance current waveforms $[eqn]$ , and the output voltages of the TPFWRs $[eqn]$ , and $[eqn]$ , obtained both in simulation and experimentally in the module, in this way, there is a notable coherence between the experimental and simulated results, ratifying the validity of the module in this experiment.

Fig. 18DCST circuit implementation. (a) Simplified schematic diagram. (b) Connections on the front panels of the two modules.Fig. 19. Waveforms for $[eqn]$ , $[eqn]$ , and $[eqn]$ for DCST. (a) Simulation for $[eqn]$ , and $[eqn]$ : 100 V/div, $[eqn]$ : 1 A/div. (b) Experimental results.

Third experiment: TPHWR with R load

7.3

TPHWR is a converter circuit AC–DC obtained from the TPFWR by replacing the $[eqn]$ of the lower half by power diodes, as a result, the period of the TPHWR output voltage waveform is only one third of the period in the TPFWR; likewise, the inverter operation is not possible. The TPHWR is more cost-effective since diodes are significantly less costly than $[eqn]$ ; besides, they do not require control electronics for the delay angle. On the other hand, the TPHWR is used in the same applications as the TPFWR, except when its operation as an inverter is required. This subsection displays the use of the proposed SCRs module in an electrical or electronic engineering laboratory activity, which is based on connecting a resistor to the output of a TPHWR as shown in Fig. 20(a). The respective connections necessary for its implementation on the SCR module are shown in Fig. 20(b). In this activity, the following parameters were used: RMS voltage of 125 V for the grid (A,B,C), a resistance $[eqn]$ equal to 900 Ω, and $[eqn]$ of $[eqn]$ . The activity begins with energizing the module’s power supply, followed by setting the desired value of $[eqn]$ ; finally, the module connects to the power grid (A,B,C). Fig. 21 shows current waveforms $[eqn]$ and the voltage $[eqn]$ in the load, obtained both in simulation and experimentally in the SCRs module. The functionality of the module was validated by comparing the experimental waveforms with the simulated ones, the results show a significant agreement, displaying the effectiveness of the module in this experiment.

Fig. 20TPHWR with load $[eqn]$ . (a) Simplified schematic diagram. (b) Connections on the front panel of the module.Fig. 21. Waveforms $[eqn]$ , and $[eqn]$ for TPHWR with $[eqn]$ load. (a) Simulation; $[eqn]$ : 50 V/div, $[eqn]$ : 0.5 A/div. (b) Experimental results.

Fourth experiment: TPVC with resistive load in star configuration

7.4

TPVC is an AC–AC converter circuit (also known as AC regulator) utilized to modify the RMS load voltage at a constant frequency achieving this adjustment through phase control and natural switching. Typical applications of TPVCs include the control of lighting and heating systems, tap changing in in-service transformers, as well as soft starting and speed regulation in pump and fan drives. This subsection shows the use of the proposed SCR module in an electrical or electronic engineering laboratory activity, which consists of connecting three resistors arranged in a star configuration to the output of a TPVC, as shown in Fig. 22(a). The corresponding connections required for its implementation on the SCR module are shown in Fig. 22(b). The parameters used in this activity are the following: RMS voltage of 125 V for the power grid (A,B,C), three resistors $[eqn]$ in star configuration 480 Ω, and $[eqn]$ equal to $[eqn]$ . The activity begins with energizing the module power supply, followed by setting the desired value for $[eqn]$ . Finally, the module is connected to the grid (A,B,C). Fig. 23 shows voltage waveforms $[eqn]$ and $[eqn]$ in the load obtained through simulation and experimentally. The functionality of the module was confirmed by contrasting the experimental waveforms with the simulated ones, displaying the agreement in the results. This consistency allows to verify the effectiveness of the module in this experiment.

Fig. 22TPVC in star configuration. (a) simplified schematic diagram. (b) Connections on the front panel of the module.Fig. 23. Waveforms $[eqn]$ , and $[eqn]$ for TPVC in star configuration. (a) Simulation; $[eqn]$ , and $[eqn]$ : 50 V/div (b) Experimental results.

Fifth experiment: RPSC monophase implementation

7.5

Typically, capacitors are used in parallel with inductive loads to improve power factor. When the reactive power requirement for a load is constant, selecting a fixed-value capacitor to adjust the power factor to unity is feasible. However, when changes in reactive power occur, the choice of a fixed capacitor will result in a variation of the power factor. The circuit depicted in Fig. 24(a) represents the application of a single-phase AC–AC voltage controller that maintains the power factor close to unity, even when reactive power values fluctuate in the load. Here, the capacitor provides a constant reactive power, while depending on the delay angle the inductance absorbs a variable reactive power. The reactive power resulting from the interaction between the inductor and the capacitor is adjusted to reach a power factor close to unity. This subsection presents the application of the proposed SCRs module in an electrical or electronic engineering laboratory activity. This activity aims to vary the power factor through a single-phase AC–AC voltage controller. Fig. 24(b) shows the necessary connections for the implementation of this experiment on the SCRs module. In this activity, the parameters used were RMS voltage of 125 V for the line A, a resistance $[eqn]$ of 90 Ω, a capacitor $[eqn]$ equal to 15 µF and an inductance $[eqn]$ of 0.46 H with an equivalent series resistance of 10 Ω due to copper loss. To carry out this activity; first, the module power supply is energized; second, $[eqn]$ is set to $[eqn]$ ; third, the module is connected to line voltage A; Finally, the gradual decrease of $[eqn]$ begins, obtaining the values detailed in Table 2. The operation of the SCR module was verified through a comparison between the experimentally measured power factor and the simulated result (displayed in Table 2); therefore, there is consistency between the experimental and simulated results, supporting the validity of the module.

Fig. 24RPSC single-phase implementation. (a) simplified schematic diagram. (b) Connections on the front panel of the module.Table 2. Power factor in the single-phase static reactive compensator.PF (Experimental)PF (Simulation) $[eqn]$ 0.8680.896 $[eqn]$ 0.8680.896 $[eqn]$ 0.8700.897 $[eqn]$ 0.8780.905 $[eqn]$ 0.8900.917 $[eqn]$ 0.9060.933 $[eqn]$ 0.9320.953 $[eqn]$ 0.9600.974 $[eqn]$ 0.9800.991 $[eqn]$ 0.9920.999 $[eqn]$

Discussion

8

Since the SCR is an essential element in circuits for the conversion of electrical energy into alternating current, having the necessary elements for teaching the operation of SCRs is a fundamental aspect in universities where electronic, electrical, and related engineering programs are available. The design of these types of educational modules must consider ease of use and versatility in the implementation of different experiments.

The previous sections displayed different experiments that can be implemented for teaching purposes. This module can be also used in research to examine particular aspects of conversion circuits, such as operating times, waveforms, power calculations, harmonics, and efficiency, among others. Particularly, regarding the use of the module in research, DCST (Fig. 18) and RPSC (Fig. 24) circuits are used in alternating current microgrids and power factor correction systems, both relevant research topics currently.

Conclusions

9

This document presented an experimental module for education and research of SCRs in power electronics, where different experiments with a progressive level of complexity are proposed. It begins with experiments with a controlled and semi-controlled rectifier and ends with a more complex experiment for direct current power transmission with reactive power compensation using AC–AC voltage controllers. Applications with resistive load and active load are also considered.

For the TPFWR experiment with $[eqn]$ load, the functionality of the module was checked by comparing the experimental waveforms with the simulated ones. The results show a significant agreement, displaying the module’s effectiveness in this experiment.

In a second experiment, a DCST was implemented, which is a system used in direct current transmission lines for power transmission over long distances. A notable coherence is observed between the experimental and simulated results, confirming the validity of the module in this experiment.

The third experiment consists of a TPHWR, which is an AC–DC converter circuit obtained from the TPFWR. The functionality of the module was validated by comparing the experimental waveforms with the simulated ones. The results show a significant agreement, demonstrating the module’s effectiveness in this experiment.

In the fourth experiment, a TPVC with a resistive load is arranged in a star configuration. This AC–AC converter circuit, also known as an AC regulator, is used to vary the RMS load voltage at constant frequency. In this case, the module’s functionality was confirmed by contrasting the experimental waveforms with the simulated ones, revealing a marked agreement in the results.

The single-phase RPSC experiment consists of a single-phase AC–AC voltage controller application that maintains a power factor close to unity, even when reactive power values vary across the load. The operation of the SCRs module was verified through a comparison between the experimentally measured power factor and the simulated power factor, showing a remarkable agreement between the experimental and simulated results, supporting the validity of the module in this experiment.

This work seeks to generate a reference framework for the development of experiments with SCRs in the field of teaching and research. The module is intended to be open source, allowing access to the DSP’s resources to implement the circuits and the programming software.

It is expected in future work to extend this type of modules to more general open source power electronics applications to contribute to the community interested in energy conversion research.

CRediT authorship contribution statement

Jhon Bayona: Writing – review & editing, Writing – original draft, Validation, Software, Methodology, Investigation, Formal analysis, Conceptualization. Nancy Gélvez: Writing – review & editing, Writing – original draft, Methodology, Investigation, Conceptualization. Helbert Espitia: Writing – review & editing, Writing – original draft, Supervision, Methodology, Investigation, Conceptualization.

Declaration of competing interest

The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.