# SiC Double-Trench MOSFETs with an Integrated MOS-Channel Diode for Improved Third-Quadrant Performance

## TL;DR

A new SiC MOSFET design with an integrated diode improves performance by reducing voltage and resistance while maintaining breakdown voltage.

## Contribution

A novel double-trench SiC MOSFET with an integrated MOS-channel diode is proposed to enhance third-quadrant performance.

## Key findings

- The cut-in voltage Von is reduced by 69.2% due to the drain-induced barrier-lowering effect.
- The specific on-resistance Ron,sp is lowered by reducing the p-well region and the JFET effect.
- Switching loss increases slightly due to higher gate charge Qg.

## Abstract

In this article, a novel double-trench SiC MOSFET with an integrated MOS-channel diode (MCD) is proposed and analyzed through TCAD simulations. The MCD incorporates a short channel, where the channel length can be adjusted by modifying the recess depth. Owing to the drain-induced barrier-lowering (DIBL) effect, a low potential barrier is created for electrons flowing from the JFET region to the N+ source region. This effectively eliminates the bipolar degradation of the parasitic body p-i-n diode and reduces the cut-in voltage Von by 69.2%. Additionally, the breakdown voltage (BV) remains nearly unchanged. The reduction in the p-well region alleviates the JFET effect, successfully lowering the specific on-resistance Ron,sp, making the channel easier to turn on, and reducing the threshold voltage (Vth). However, the increase in the gate charge Qg results in a slight rise in the switching loss.