# Structural design of memory system for Ternary Optical Computer

## TL;DR

This paper presents a memory system design for a Ternary Optical Computer, addressing tri-state optical signal storage through interface structure implementation and experimental validation.

## Contribution

The novel contribution is the design and experimental validation of a memory system interface tailored for tri-state optical signals in Ternary Optical Computers.

## Key findings

- The memory system interface structure was designed to meet the tri-state optical signal storage requirements of Ternary Optical Computers.
- Experiments on FPGA verified the correctness of the memory system interface design for the SD16 TOC prototype.
- The work enhances the theoretical and practical foundations of Ternary Optical Computers.

## Abstract

Ternary Optical Computer (TOC) is unique in the development of optical computers, in terms of principle, experiment, algorithm and application. After 20 years of development, six generations of prototypes have been developed. At present, tri-state optical signal storage is the main problem faced by TOC. According to the characteristics of tri-state optical signals and the ternary optical processor’s special requirements for storage systems, we design and implement the interface structure of TOC memory system, including the overall structure of the interface, the address generation module for memory access, the data input and output channels, the read/write timing, and the working process of the memory interface. Finally, the correctness of the memory system interface design is verified by the experiments, which are carried out on FPGA, of reading and writing operational result data of the SD16 TOC prototype. This work tries to improve the theoretical system and practical basis of TOC.