# Robust Pixel Design Methodologies for a Vertical Avalanche Photodiode (VAPD)-Based CMOS Image Sensor

## TL;DR

This paper introduces design methods for a CMOS image sensor that improves performance under various conditions like temperature and light intensity.

## Contribution

The paper introduces a guard-ring-free pixel design and a global feedback resistor to enhance sensor stability and performance.

## Key findings

- The guard-ring-free design effectively manages electric field concentration and pixel isolation.
- The global feedback resistor suppresses variations in device characteristics due to voltage and temperature.
- The sensor demonstrated robustness through extensive testing at high temperatures and light exposure.

## Abstract

We present robust pixel design methodologies for a vertical avalanche photodiode-based CMOS image sensor, taking account of three critical practical factors: (i) “guard-ring-free” pixel isolation layout, (ii) device characteristics “insensitive” to applied voltage and temperature, and (iii) stable operation subject to intense light exposure. The “guard-ring-free” pixel design is established by resolving the tradeoff relationship between electric field concentration and pixel isolation. The effectiveness of the optimization strategy is validated both by simulation and experiment. To realize insensitivity to voltage and temperature variations, a global feedback resistor is shown to effectively suppress variations in device characteristics such as photon detection efficiency and dark count rate. An in-pixel overflow transistor is also introduced to enhance the resistance to strong illumination. The robustness of the fabricated VAPD-CIS is verified by characterization of 122 different chips and through a high-temperature and intense-light-illumination operation test with 5 chips, conducted at 125 °C for 1000 h subject to 940 nm light exposure equivalent to 10 kLux.