# Study of graphene p-n junctions formed by the electrostatic modification of the SiO2 substrate

## TL;DR

This paper explores how to create and study graphene p-n junctions using electrostatic modifications in a silicon dioxide substrate.

## Contribution

The study introduces an electrical-stressing-voltage technique to form p-n junctions in graphene using a single-gated transistor setup.

## Key findings

- Transport characteristics differ quantitatively between perturbed and unperturbed regions near Dirac points.
- Longitudinal resistance is highly sensitive to external magnetic fields when the device operates as a p-n junction.
- The Hall effect shows distinct behavior in the modified and unmodified regions of the graphene channel.

## Abstract

We study the transport properties of mm-scale CVD graphene p-n junctions, which are formed in a single gated graphene field effect transistor configuration. Here, an electrical-stressing-voltage technique served to modify the electrostatic potential in the SiO2/Si substrate and create the p-n junction. We examine the transport characteristics about the Dirac points that are localized in the perturbed and unperturbed regions in the graphene channel and note the quantitative differences in the Hall effect between the perturbed and unperturbed regions. The results also show that the longitudinal resistance is highly sensitive to the external magnetic field when the Hall bar device operates as a p-n junction.