# A Dual-Mode CMOS Power Amplifier with an External Power Amplifier Driver Using 40 nm CMOS for Narrowband Internet-of-Things Applications

**Authors:** Hyunjin Ahn, Kyutaek Oh, Se-Eun Choi, Dong-Hee Son, Ilku Nam, Kyoohyun Lim, Ockgoo Lee

PMC · DOI: 10.3390/nano14030262 · Nanomaterials · 2024-01-25

## TL;DR

This paper introduces a dual-mode CMOS power amplifier for NB-IoT devices that improves battery life and performance.

## Contribution

A dual-mode CMOS PA with an external PA driver for NB-IoT that maintains performance in both modes.

## Key findings

- The PA achieves 20.4 dB gain and 28.8 dBm saturated output power in high-power mode.
- It saves over 80% current consumption in low-power mode compared to high-power mode at 12 dBm output.

## Abstract

The narrowband Internet-of-Things (NB-IoT) has been developed to provide low-power, wide-area IoT applications. The efficiency of a power amplifier (PA) in a transmitter is crucial for a longer battery lifetime, satisfying the requirements for output power and linearity. In addition, the design of an internal complementary metal-oxide semiconductor (CMOS) PA is typically required when considering commercial applications to include the operation of an optional external PA. This paper presents a dual-mode CMOS PA with an external PA driver for NB-IoT applications. The proposed PA supports an external PA mode without degrading the performances of output power, linearity, and stability. In the operation of an external PA mode, the PA provides a sufficient gain to drive an external PA. A parallel-combined transistor method is adopted for a dual-mode operation and a third-order intermodulation distortion (IMD3) cancellation. The proposed CMOS PA with an external PA driver was implemented using 40 nm-CMOS technology. The PA achieves a gain of 20.4 dB, a saturated output power of 28.8 dBm, and a power-added efficiency (PAE) of 57.8% in high-power (HP) mode at 920 MHz. With an NB-IoT signal (200 kHz π/4-differential quadrature phase shift keying (DQPSK)), the proposed PA achieves 24.2 dBm output power (Pout) with a 31.0% PAE, while satisfying −45 dBc adjacent channel leakage ratio (ACLR). More than 80% of the current consumption at 12 dBm Pout could be saved compared to that in HP mode when the proposed PA operates in low-power (LP) mode. The implemented dual-mode CMOS PA provides high linear output power with high efficiency, while supporting an external PA mode. The proposed PA is a good candidate for NB-IoT applications.

## Full-text entities

- **Chemicals:** CMOS (-)

## Full text

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## Figures

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## References

22 references — full list in the complete paper: https://tomesphere.com/paper/PMC10857100/full.md

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Source: https://tomesphere.com/paper/PMC10857100