Energy-efficient programmable integrated photonics via optimized Euler rotations

TL;DR

This paper presents a geometric framework for optimizing energy consumption in programmable integrated photonics by selecting minimal-energy Euler rotation trajectories, validated across various silicon photonic architectures.

Contribution

It introduces a novel approach to reduce energy use in PIP circuits by exploiting Euler rotations on the Bloch sphere, enabling more efficient large-scale photonic processors.

Findings

Identified minimum-energy rotation configurations for 2x2 unitary matrices.

Validated energy savings in diverse silicon PIP architectures.

Demonstrated potential for scalable, energy-efficient photonic computing.

Abstract

Programmable integrated photonics (PIP) has emerged as a powerful on-chip platform for optical signal processing and computing, enabling the implementation of reconfigurable N$\times$N unitary matrix transformations through meshes of tunable interferometers, which realize 2$\times$2 unitary matrices. However, the energy consumption associated with phase-shifter actuation is becoming a major limitation to the scalability of PIP platforms. Here, we introduce a geometric framework for energy optimization in PIP circuits by exploiting the representation of 2$\times$2 unitary matrices as concatenations of basic Euler rotations on the Bloch sphere. We show that equivalent implementations of the same N$\times$N unitary matrix (N $\geq$ 2) can exhibit markedly different energy costs depending on the rotation trajectories on the Bloch sphere implemented by each interferometer. Leveraging this insight, we identify minimum-energy configurations by systematically selecting the shortest rotation trajectories. We experimentally and numerically validate the proposed approach in diverse silicon PIP architectures, including feedforward and multipurpose hexagonal meshes, neural network accelerators, and photonic quantum-gate implementations. These results establish a general route toward more energy-efficient large-scale PIP processors for classical and quantum signal processing and computing applications.