Quantum Sidecar Architectures for Hybrid AI Training and Inference: Stateful Protected Registers, Stateless Reset-and-Reprepare Circuits and Quantum Weight-State Outlook
Y.Mo, G.D.Su

TL;DR
This paper introduces a quantum sidecar architecture for hybrid AI systems, featuring stateful protected registers and stateless reset-and-reprepare circuits to enhance quantum co-processors in training and inference.
Contribution
It proposes a novel quantum sidecar framework with two operating modes, enabling efficient quantum resource management in hybrid AI pipelines.
Findings
Simulated stateful mode with protected-qubit parity readout using Qiskit.
Analyzed reset-overhead for stateless mode with candidate-update sampling.
Introduced quantum weight-state sidecars for model-control variable representations.
Abstract
We propose a quantum sidecar architecture family for future hybrid AI training and inference. The central idea is not to store an entire Transformer in a small quantum memory, nor to claim one-shot collapse into a fully trained model or an optimal answer. Instead, we identify two physically distinct operating modes for quantum co-processors attached to classical large-model pipelines. The first is a stateful protected-register mode, in which a protected register stores a reusable quantum resource while an ancilla or temporary register performs QND-style readout. The second is a stateless reset-and-reprepare mode, in which each query prepares a task-conditioned quantum circuit, evolves over bounded training or inference control variables, measures candidate signals, resets the qubits, and repeats. We simulate the stateful mode using 2/4/6/8 protected-qubit density-matrix QND-style parity…
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